reg automatic router for analog layout in virtuoso

N

noreply

Guest
Dear all,
I'm looking for an automatic router for analog layout in cadence
virtuoso....
Have you ever worked with any automated routers for analog layout(no
digital layout stuff please).?
If you have tried your hand in the above,
*Could you please advice me how to proceed about it?
*Have you written any skill codes in this regard(I don't need any code
to copy paste, if you would provide any clue/related command, I can
write it)?
Thanks and regards,
Lokesh rajendran.
 
noreply wrote, on 07/08/09 10:56:
Dear all,
I'm looking for an automatic router for analog layout in cadence
virtuoso....
Have you ever worked with any automated routers for analog layout(no
digital layout stuff please).?
If you have tried your hand in the above,
*Could you please advice me how to proceed about it?
*Have you written any skill codes in this regard(I don't need any code
to copy paste, if you would provide any clue/related command, I can
write it)?
Thanks and regards,
Lokesh rajendran.
There are two Cadence routers which can be used for analog. VCAR (in IC5141 and
IC613), and VSR (just in IC613).

Regrds,

Andrew.
 
noreply wrote, on 07/09/09 10:06:
Hi all,
I'm trying to do routing for a virtuoso layout(I have done placement
of the devices) using VCAR. I'm completely new to the tool.
From doing GOOGLE, I understood that there is a GUI method for writing
rules ".rul" file that has to be fed to the router.
Does anyone know any model ".rul" that can be used for initial
learning.
Any comments that would lead me to the creation of my own ".rul" are
welcomed.
{If any knows any similar links in sourcelink.com, please do post
here}
Thanks and regards,
Lokesh rajendran.
First of all, look in your ICC (e.g. ICC11241) installation, in <ICCinstDir>/doc.

You'll find:

iccausr/iccausr.pdf "Virtuoso Chip Assembly Router Guide"
iccdlr/iccdlr.pdf "Virtuoso Chip Assembly Router Design Language Reference"

Regards,

Andrew.
 
Hi all,
I'm trying to do routing for a virtuoso layout(I have done placement
of the devices) using VCAR. I'm completely new to the tool.
From doing GOOGLE, I understood that there is a GUI method for writing
rules ".rul" file that has to be fed to the router.
Does anyone know any model ".rul" that can be used for initial
learning.
Any comments that would lead me to the creation of my own ".rul" are
welcomed.
{If any knows any similar links in sourcelink.com, please do post
here}
Thanks and regards,
Lokesh rajendran.

On Jul 8, 5:14 pm, Andrew Beckett <andr...@DcEaLdEeTnEcTe.HcIoSm>
wrote:
noreply wrote, on 07/08/09 10:56:

Dear all,
I'm looking for an automatic router for analog layout in cadence
virtuoso....
Have you ever worked with any automated routers for analog layout(no
digital layout stuff please).?
If you have tried your hand in the above,
*Could you please advice me how to proceed about it?
*Have you written any skill codes in this regard(I don't need any code
to copy paste, if you would provide any clue/related command, I can
write it)?
Thanks and regards,
Lokesh rajendran.

There are two Cadence routers which can be used for analog. VCAR (in IC5141 and
IC613), and VSR (just in IC613).

Regrds,

Andrew.
 
Hi andrew,
As per your suggestion I installed the ICC11241 stream.
But I'm not able to access the tool(VCAR).
The following error was shown in the console:
# <<ERROR:>> Feature Cadence_chip_assembly_router not available.
# Feature Status:
# ERROR (LM -30): license server ("XXXX") does not support feature
"Cadence_chip_assembly_router" (run 'lic_error -30' for more
information)
# Exiting because of license failure
/cad/tools/icc11241/tools/iccraft/bin/sbtool.exe: Symbol `_XmStrings'
has different size in shared object, consider re-linking

I think the error message implies that i have no license for
"Cadence_chip_assembly_router". Could you please comment on the
procedure that i have to follow in order to obtain the license(or any
other related comments).

Thanks and regards,
Lokesh rajendran.

On Jul 9, 3:07 pm, Andrew Beckett <andr...@DcEaLdEeTnEcTe.HcIoSm>
wrote:
noreply wrote, on 07/09/09 10:06:

Hi all,
I'm trying to do routing for a virtuoso layout(I have done placement
of the devices) using VCAR. I'm completely new to the tool.
From doing GOOGLE, I understood that there is a GUI method for writing
rules ".rul" file that has to be fed to the router.
Does anyone know any model ".rul" that can be used for initial
learning.
Any comments that would lead me to the creation of my own ".rul" are
welcomed.
{If any knows any similar links in sourcelink.com, please do post
here}
Thanks and regards,
Lokesh rajendran.

First of all, look in your ICC (e.g. ICC11241) installation, in <ICCinstDir>/doc.

You'll find:

iccausr/iccausr.pdf "Virtuoso Chip Assembly Router Guide"
iccdlr/iccdlr.pdf "Virtuoso Chip Assembly Router Design Language Reference"

Regards,

Andrew.
 
noreply wrote, on 07/10/09 07:34:
I think the error message implies that i have no license for
"Cadence_chip_assembly_router". Could you please comment on the
procedure that i have to follow in order to obtain the license(or any
other related comments).
Buy the product?

I have no idea what organisation you work for. If it's a commercial business,
you should talk to your Cadence account manager. If it's a university, I suspect
you probably already have access, but need to talk to whoever sorts out the
licenses.

Note if you're using IC61X, you don't need to install ICC11241, as VCAR is
included in the IC61X installation. But you'll still need either a specific VCAR
license, or VLS GXL tokens.

Regards,

Andrew.
 
I am using VCAR with IC6.13 and with AMS Hit-Kit and I am having some
issues.
Is there anyone using this combination of tools? Are you having
problems with them?

Regards,

Daniel
 
Hi Daniel,

If you don't tell us what kind of issues you have, then we are not
likely to help.
Just post your warnings, error messages if you want your query to go
further ...

Cheers,
Riad.
 
Hi Riad.

In the virtuoso layout window pressing the VCAR icon to start it, the
following messages appear (printed in a VCAR windown and in the CIW):

# << WARNING >> Non abstract OA master design - pmosrf has no pins
and no blockages.
# << ERROR >> Master design (PRIMLIBRF - pmosrf - layout) has no
boundary - ignoring its instances.
# << WARNING >> Non abstract OA master design - nmosrf has no pins
and no blockages.
# << ERROR >> Master design (PRIMLIBRF - nmosrf - layout) has no
boundary - ignoring its instances.
# << ERROR >> Ignoring unbound inst-term!
# net = in, term = G, inst = |MN1
# master: lib = PRIMLIBRF, cell = pmosrf, view = layout
# << ERROR >> Ignoring unbound inst-term!
# net = in, term = G, inst = |MN0
# master: lib = PRIMLIBRF, cell = nmosrf, view = layout
# << ERROR >> Ignoring unbound inst-term!
# net = out, term = D, inst = |MN1
# master: lib = PRIMLIBRF, cell = pmosrf, view = layout
# << ERROR >> Ignoring unbound inst-term!
# net = out, term = D, inst = |MN0
# master: lib = PRIMLIBRF, cell = nmosrf, view = layout
# << ERROR >> Ignoring unbound inst-term!
# net = gnd!, term = B, inst = |MN0
# master: lib = PRIMLIBRF, cell = nmosrf, view = layout
# << ERROR >> Ignoring unbound inst-term!
# net = gnd!, term = S, inst = |MN0
# master: lib = PRIMLIBRF, cell = nmosrf, view = layout
# << ERROR >> Ignoring unbound inst-term!
# net = vdd!, term = B, inst = |MN1
# master: lib = PRIMLIBRF, cell = pmosrf, view = layout
# << ERROR >> Ignoring unbound inst-term!
# net = vdd!, term = S, inst = |MN1
# master: lib = PRIMLIBRF, cell = pmosrf, view = layout
# << WARNING >> 3 layer(s) in the validLayers constraint in the
session constraint group have illegal layer function.

This happens only with pmosrf and nmosrf, not with "normal"
transistors or other components. This also happens only when using Hit-
Kit 4.0...with AMS Hit-Kit 3.70 its works fine.
Can this be a Hit-Kit problem?

Best Regards,
Daniel
 
Daniel Oliveira wrote, on 08/20/09 15:22:
Hi Riad.

In the virtuoso layout window pressing the VCAR icon to start it, the
following messages appear (printed in a VCAR windown and in the CIW):

# << WARNING >> Non abstract OA master design - pmosrf has no pins
and no blockages.
# << ERROR >> Master design (PRIMLIBRF - pmosrf - layout) has no
boundary - ignoring its instances.
# << WARNING >> Non abstract OA master design - nmosrf has no pins
and no blockages.
# << ERROR >> Master design (PRIMLIBRF - nmosrf - layout) has no
boundary - ignoring its instances.
# << ERROR >> Ignoring unbound inst-term!
# net = in, term = G, inst = |MN1
# master: lib = PRIMLIBRF, cell = pmosrf, view = layout
# << ERROR >> Ignoring unbound inst-term!
# net = in, term = G, inst = |MN0
# master: lib = PRIMLIBRF, cell = nmosrf, view = layout
# << ERROR >> Ignoring unbound inst-term!
# net = out, term = D, inst = |MN1
# master: lib = PRIMLIBRF, cell = pmosrf, view = layout
# << ERROR >> Ignoring unbound inst-term!
# net = out, term = D, inst = |MN0
# master: lib = PRIMLIBRF, cell = nmosrf, view = layout
# << ERROR >> Ignoring unbound inst-term!
# net = gnd!, term = B, inst = |MN0
# master: lib = PRIMLIBRF, cell = nmosrf, view = layout
# << ERROR >> Ignoring unbound inst-term!
# net = gnd!, term = S, inst = |MN0
# master: lib = PRIMLIBRF, cell = nmosrf, view = layout
# << ERROR >> Ignoring unbound inst-term!
# net = vdd!, term = B, inst = |MN1
# master: lib = PRIMLIBRF, cell = pmosrf, view = layout
# << ERROR >> Ignoring unbound inst-term!
# net = vdd!, term = S, inst = |MN1
# master: lib = PRIMLIBRF, cell = pmosrf, view = layout
# << WARNING >> 3 layer(s) in the validLayers constraint in the
session constraint group have illegal layer function.

This happens only with pmosrf and nmosrf, not with "normal"
transistors or other components. This also happens only when using Hit-
Kit 4.0...with AMS Hit-Kit 3.70 its works fine.
Can this be a Hit-Kit problem?

Best Regards,
Daniel
It rather sounds like it! I suspect something is wrong with the icc.rules.

Have you reported it to AMS?

Andrew.
 
No, I did not yet reported this problem to AMS. I think that is what I
am going to do, because I am trying to solve this problem without any
success for too long.
I was trying to know if anyone else has the same error, but I did not
find relevant information about the use of VCAR with Hit-Kit 4.0.

Thanks for all your support.
If they provide a solution I will post it here.

Best regards,
Daniel
 

Welcome to EDABoard.com

Sponsor

Back
Top