$readmemh()

K

Kausi

Guest
Is $readmemh synthesizable ?

Iam using Xilinx ISE 9.2i..

If yes does can i use a .txt or .hex file or is there some other
format ?
 
On 2009-06-11, Kausi <kauser.johar@gmail.com> wrote:
Is $readmemh synthesizable ?

Iam using Xilinx ISE 9.2i..

If yes does can i use a .txt or .hex file or is there some other
format ?
Click to expand...
Yes, at least according to the ISE 9.2 documentation. Take a look at
doc/usenglish/books/docs/xst/xst.pdf in your ISE folder.

/Andreas
 
LittleAlex <alex.louie@email.com> wrote:
On Jun 11, 7:30?am, Kausi <kauser.jo...@gmail.com> wrote:
Is $readmemh synthesizable ?

You're kidding, right?
Click to expand...
When I first learned about it, $readmemh was for initializing ROMs.

I don't know how else it is used, but a convenient way to
load large tables into ROM would be nice.

-- glen
 
I did check out the XST document. I guess that would be a good enough
guide to know if the code would be synthesizable.. And surprisingly it
does mention the use of $readmemh.. I tried to create a ROM model and
initialized it using a .mem file... It does not throw any error in the
synthesis report.. But somehow it doesn't initialize it correctly
either.

I have another question.. I need to design a block interleaver.
Contents of input buffer are written to an output buffer. The
challenge is to do it in one clock cycle- for which i will need a very
large buffer. The problem is i need to create a matrix of buffers
( possibly 16*6) and read in one go.. Any suggestions ? How do i
normally go about designing a multi dimentional buffer.

Kauser.
 
On Thu, 11 Jun 2009 13:11:00 -0700 (PDT), Kausi
<kauser.johar@gmail.com> wrote:

I did check out the XST document. I guess that would be a good enough
guide to know if the code would be synthesizable.. And surprisingly it
does mention the use of $readmemh.. I tried to create a ROM model and
initialized it using a .mem file... It does not throw any error in the
synthesis report.. But somehow it doesn't initialize it correctly
either.

Did you follow the instructions and the samples in the XST user guide
Click to expand...
carefully? Also does you simulation load the memory correctly ? Make
sure that you can simulate, then XST should be able to use the same
file.
--
Muzaffer Kal

DSPIA INC.
ASIC/FPGA Design Services

http://www.dspia.com
 
On Thu, 11 Jun 2009 08:22:08 -0700 (PDT), LittleAlex
<alex.louie@email.com> wrote:

On Jun 11, 7:30 am, Kausi <kauser.jo...@gmail.com> wrote:
Is $readmemh synthesizable ?


You're kidding, right?
Click to expand...
Suppose the synthesizer has a memory compiler which it can call to
generate the memory macros it finds in the design, then suppose that
the said memory compiler accepts a file name to initialize the
contents of the memories it generates. This would even work within an
ASIC flow for ROMs let alone in an FPGA flow where there is really no
uninitialized memory and all the contents of all memories (RAM & ROM
(which actually doesn't exist in an FPGA)) can be loaded to a bit file
to be downloaded to the FPGA. In that case this makes perfect sense.
--
Muzaffer Kal

DSPIA INC.
ASIC/FPGA Design Services

http://www.dspia.com
 
Muzaffer Kal <kal@dspia.com> wrote:
(snip)
< This would even work within an
< ASIC flow for ROMs let alone in an FPGA flow where there is really no
< uninitialized memory and all the contents of all memories (RAM & ROM
< (which actually doesn't exist in an FPGA)) can be loaded to a bit file
< to be downloaded to the FPGA. In that case this makes perfect sense.

I believe that earlier FPGA families wouldn't guarantee the
ability to initialize RAM. That is, that write enable stay inactive
at the appropriate time. As I understand it, many now allow
for initialized RAM. ROM doesn't have write enable, so that
problem doesn't appear.

-- glen
 
On 2009-06-16, gabor <gabor@alacron.com> wrote:
XST is a little more restrictive than simulators. The $readmemh
needs to be in an initial block in the same module where the
memory array is declared. Other than that, it should match
the simulation for generating initialized memories or ROMs.
Click to expand...
In the past I've had problems when initiating part of a memory with
initial statements. For example, the following example didn't work
because the entire memory was not initialized:

reg [7:0] foo[15:0];

initial begin
foo[0] = 9;
foo[1] = 5;
end


In this case XST gave an error in the synthesis log file if I remember
correctly. I'm just guessing here, but perhaps the original poster is
having the same problems even though you are using $readmemh instead of
plain variable assignments to initialize your memory?

/Andreas
 
On Jun 11, 6:53 pm, Muzaffer Kal <k...@dspia.com> wrote:
On Thu, 11 Jun 2009 13:11:00 -0700 (PDT), Kausi

kauser.jo...@gmail.com> wrote:
I did check out the XST document. I guess that would be a good enough
guide to know if the code would be synthesizable.. And surprisingly it
does mention the use of $readmemh.. I tried to create a ROM model and
initialized it using a .mem file... It does not throw any error in the
synthesis report.. But somehow it doesn't initialize it correctly
either.

Did you follow the instructions and the samples in the XST user guide
carefully? Also does you simulation load the memory correctly ? Make
sure that you can simulate, then XST should be able to use the same
file.
--
Muzaffer Kal

DSPIA INC.
ASIC/FPGA Design Services

http://www.dspia.com
Click to expand...
XST is a little more restrictive than simulators. The $readmemh
needs to be in an initial block in the same module where the
memory array is declared. Other than that, it should match
the simulation for generating initialized memories or ROMs.
 
On 16 June, 12:26, Andreas Ehliar <ehliar-nos...@isy.liu.se> wrote:
On 2009-06-16, gabor <ga...@alacron.com> wrote:

XST is a little more restrictive than simulators.  The $readmemh
needs to be in an initial block in the same module where the
memory array is declared.  Other than that, it should match
the simulation for generating initialized memories or ROMs.

In the past I've had problems when initiating part of a memory with
initial statements. For example, the following example didn't work
because the entire memory was not initialized:

reg [7:0] foo[15:0];

initial begin
    foo[0] = 9;
    foo[1] = 5;
end

In this case XST gave an error in the synthesis log file if I remember
correctly. I'm just guessing here, but perhaps the original poster is
having the same problems even though you are using $readmemh instead of
plain variable assignments to initialize your memory?

/Andreas
Click to expand...
When i try to initialize using $readmemh-> It only returns a warning
saying that the memory is tied to zero as it was partially
initialized.

reg mem [0:47];
initial $readmemb("ScDataIn.txt", mem);

The file contains 48 binary numbers.

Am i missing something ?
 
On Jun 18, 7:25 am, Kausi <kauser.jo...@gmail.com> wrote:
On 16 June, 12:26, Andreas Ehliar <ehliar-nos...@isy.liu.se> wrote:



On 2009-06-16, gabor <ga...@alacron.com> wrote:

XST is a little more restrictive than simulators.  The $readmemh
needs to be in an initial block in the same module where the
memory array is declared.  Other than that, it should match
the simulation for generating initialized memories or ROMs.

In the past I've had problems when initiating part of a memory with
initial statements. For example, the following example didn't work
because the entire memory was not initialized:

reg [7:0] foo[15:0];

initial begin
    foo[0] = 9;
    foo[1] = 5;
end

In this case XST gave an error in the synthesis log file if I remember
correctly. I'm just guessing here, but perhaps the original poster is
having the same problems even though you are using $readmemh instead of
plain variable assignments to initialize your memory?

/Andreas

When i try to initialize using $readmemh-> It only returns a warning
saying that the memory is tied to zero as it was partially
initialized.

reg              mem  [0:47];
initial $readmemb("ScDataIn.txt", mem);

The file contains 48 binary numbers.

Am i missing something ?
Click to expand...
Depending on the resource used to synthesize this memory,
e.g. distributed RAM or block RAM, the actual memory is
likely to be larger than 48 elements. Although you
initialized all of the memory you declared, the synthesis
tool will warn you about the remainder of memory it
inferred being uninitialized.

regards,
Gabor
 
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