Readback Problems

S

Sushmita

Guest
Dear Sir,

I have been trying to the contents of readback block ram on spartan
II kit.

This is how i tried I syntheized and implemented the design using Jtag
clk as start up clk and enableing the readback in configuartion
option. then connnecting the jtag cable to the board . i tried to
program using Jtag Programmer(Foundation Series 3.1). I clicked on the
program in the Menu , it gave 2 warning one that the device ID is not
tht of a Xilinx device . And the other saying some BSDL file error.

I proceeded to excetute the step given in xapp188 for readback
writing CFG_IN in IR and load FAR , loading RCFG in cmd and other till
CFG_OUT was written but i saw no chnage . I did this through debug
chain option .

I dont think i am doing it right please do help me on this i need to
readback the memory how should be do it exactly

with regrads
sushmita
 

Welcome to EDABoard.com

Sponsor

Back
Top