READ FROM FILE

I have a XST 1923 error during synthesis of the following code

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use std.textio.all;
use work.txt_util.all;


entity FILE_READ is
generic (
stim_file: string := "sim.dat"
);
port(
CLK : in std_logic;
OUTPUT : out std_logic_vector(4 downto 0)

);
end FILE_READ;



architecture read_from_file of FILE_READ is

file stimulus: TEXT open read_mode is stim_file;

--signal pp:std_logic;
begin

-- read data and control information from a file

receive_data: process(CLK)

variable l: line;
variable s: string(1 to 10);

begin


while (not endfile(stimulus)) loop -- read digital data from input
file
readline(stimulus, l);
exit when endfile (stimulus);
read(l, s);
OUTPUT <= to_std_logic_vector(s);

if CLK='1' and Clk'event then --introduce a delay
pp<='1' ;
end if;

end loop;

print("I@FILE_READ: reached end of "& stim_file);

end process receive_data;

end read_from_file;


YOU CAN make SIM.DAT file using the following contents

11111
11001
11010

I am using XST

Thanks for help

 

[Andy Peters]

sarma.nedunuri@gmail.com wrote:

I have a XST 1923 error during synthesis of the following code

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use std.textio.all;
use work.txt_util.all;


entity FILE_READ is
generic (
stim_file: string := "sim.dat"
);
port(
CLK : in std_logic;
OUTPUT : out std_logic_vector(4 downto 0)

);
end FILE_READ;


I am using XST

If you'd bothered to read the XST manual, you would learn that what you
are trying to do is not allowed.

-a

 

Andy

XST 8 does allow the textio features

s