T
Tim Hubberstey
Guest
It is often necessary to extract portions of a vector using a slice.
Whenever I do this, I use constants for maintainability. I have been
using what I refer to as "range constants" where I define a vector
constant that I don't intend to use directly and then use the 'range
attribute on it to define a slice:
--------
-- define a "range constant" in a package
constant SomeField : std_logic_vector(21 downto 15)
:= (others => 'X');
--------
out_vec <= source_vec(SomeField'range);
--------
While this works quite well, it seems somewhat messy. Is there a cleaner
way to do this?
--
Tim Hubberstey, P.Eng. . . . . . Hardware/Software Consulting Engineer
Marmot Engineering . . . . . . . VHDL, ASICs, FPGAs, embedded systems
Vancouver, BC, Canada . . . . . . . . . . . http://www.marmot-eng.com
Whenever I do this, I use constants for maintainability. I have been
using what I refer to as "range constants" where I define a vector
constant that I don't intend to use directly and then use the 'range
attribute on it to define a slice:
--------
-- define a "range constant" in a package
constant SomeField : std_logic_vector(21 downto 15)
:= (others => 'X');
--------
out_vec <= source_vec(SomeField'range);
--------
While this works quite well, it seems somewhat messy. Is there a cleaner
way to do this?
--
Tim Hubberstey, P.Eng. . . . . . Hardware/Software Consulting Engineer
Marmot Engineering . . . . . . . VHDL, ASICs, FPGAs, embedded systems
Vancouver, BC, Canada . . . . . . . . . . . http://www.marmot-eng.com