ram_init_file seems to not be working

[Billy Mays]

Hey All,

I'm using Quartus II and the (* ram_init_file = "..." *)
doesn't seem to be initializing the memory allocated for it. Here are
some examples:

(* ram_init_file = "test.mif" *) reg [31:0] mem[0:127];
(* ram_init_file = "scalar.mif" *) reg [15:0] srf [0:15];
(* ram_init_file = "vector.mif" *) reg [63:0] vrf [0:63];
(* ram_init_file = "test.mif" *) reg [15:0] sinLUT[0:63];
(* ram_init_file = "cos.mif" *) reg [15:0] cosLUT[0:511];



For some reason, only the 'mem' registers seem to be initialized, even
though it has similar definitions to the sinLUT and cosLUT definitions.
The only warnings that Quartus shows are that:

Warning (10030): Net "sinLUT" at Fetch.v(36) has no driver or initial
value, using a default initial value '0'
Warning (10030): Net "cosLUT" at Fetch.v(37) has no driver or initial
value, using a default initial value '0'


These errors don't appear for the other definitions and Quartus can read
in and edit the .mif files.

Is there some newbie mistake I'm making or is there a better way to
initialize memory from a file in Verilog?

Bill

 

[gabor]

On Apr 24, 10:15 pm, Billy Mays <no...@nohow.com> wrote:

Hey All,

I'm using Quartus II and the (* ram_init_file = "..." *)
doesn't seem to be initializing the memory allocated for it.  Here are
some examples:

(* ram_init_file = "test.mif" *) reg [31:0] mem[0:127];
(* ram_init_file = "scalar.mif" *) reg [15:0] srf [0:15];
(* ram_init_file = "vector.mif" *) reg [63:0] vrf [0:63];
(* ram_init_file = "test.mif" *)  reg [15:0] sinLUT[0:63];
(* ram_init_file = "cos.mif" *) reg [15:0] cosLUT[0:511];

For some reason, only the 'mem' registers seem to be initialized, even
though it has similar definitions to the sinLUT and cosLUT definitions.
  The only warnings that Quartus shows are that:

Warning (10030): Net "sinLUT" at Fetch.v(36) has no driver or initial
value, using a default initial value '0'
Warning (10030): Net "cosLUT" at Fetch.v(37) has no driver or initial
value, using a default initial value '0'

These errors don't appear for the other definitions and Quartus can read
in and edit the .mif files.

Is there some newbie mistake I'm making or is there a better way to
initialize memory from a file in Verilog?

Bill

I don't know if Quartus supports it, but at least in XST
you can use $readmemh (or $readmemb) in an initial block
to initialize memory like:

reg [15:0] srf [0:15];

initial $readmemh ("scalar.hex", srf);

I'm not sure what format the .mif files take in
Quartus, but the Verilog LRM spells out the format
for $readmemh or $readmemb.

Just out of curiosity, if you change the order of your
memory definitions, does Quartus only initialize the
first one (even if the first one is cosLUT for example)?

If that is the case, you could try using a different
module for each memory, although that seems a bit
painful for a workaround.

-- Gabor