Raggedstone3 - Altera PCIe Development Board

J

John Adair

Guest
If you didn't see it already in our our newsletter we have a new PCIe
devopment board based on an Altera Cyclone-IV GX. The new board keeps
most of the mechanicals and features of our Raggedstone product range
but extends the bandwidth capability of the product range. The
Raggedstone3 is capabile of bandwidths exceeding 800 MBytes/s over
it's X4 PCIe interface.

Initial details of this product http://www.enterpoint.co.uk/raggedstone/raggedstone3.html.
Anyone at ESC this week can see the board there on our stand.

I am expecting this board to ship to customers in low numbers in June
or July with a significant ramp in shipping numbers after that.

John Adair
Enterpoint Ltd.
 
On 5/2/2011 1:42 PM, John Adair wrote:
If you didn't see it already in our our newsletter we have a new PCIe
devopment board based on an Altera Cyclone-IV GX. The new board keeps
most of the mechanicals and features of our Raggedstone product range
but extends the bandwidth capability of the product range. The
Raggedstone3 is capabile of bandwidths exceeding 800 MBytes/s over
it's X4 PCIe interface.

Initial details of this product http://www.enterpoint.co.uk/raggedstone/raggedstone3.html.
Anyone at ESC this week can see the board there on our stand.

I am expecting this board to ship to customers in low numbers in June
or July with a significant ramp in shipping numbers after that.

John Adair
Enterpoint Ltd.
Hi John,

I have a question for you (and the group) about PCIe. Let's say I build
a PCIe target in my Altera device, and let's say for the sake of
argument that it's a Ethernet MAC. My Linux single board computer (SBC)
has a software driver for this Ethernet device. As the Linux boots, it
sees the PCIe device and loads the driver.

What happens if, without rebooting the SBC, I reconfigure the Altera
part? How does the OS react to the PCIe device vanishing from the bus
and then subsequently reappearing?

Thanks, Symon.
 
Symon <symon_brewer@hotmail.com> wrote:

On 5/2/2011 1:42 PM, John Adair wrote:
If you didn't see it already in our our newsletter we have a new PCIe
devopment board based on an Altera Cyclone-IV GX. The new board keeps
most of the mechanicals and features of our Raggedstone product range
but extends the bandwidth capability of the product range. The
Raggedstone3 is capabile of bandwidths exceeding 800 MBytes/s over
it's X4 PCIe interface.

Initial details of this product http://www.enterpoint.co.uk/raggedstone/raggedstone3.html.
Anyone at ESC this week can see the board there on our stand.

I am expecting this board to ship to customers in low numbers in June
or July with a significant ramp in shipping numbers after that.

John Adair
Enterpoint Ltd.

Hi John,

I have a question for you (and the group) about PCIe. Let's say I build
a PCIe target in my Altera device, and let's say for the sake of
argument that it's a Ethernet MAC. My Linux single board computer (SBC)
has a software driver for this Ethernet device. As the Linux boots, it
sees the PCIe device and loads the driver.

What happens if, without rebooting the SBC, I reconfigure the Altera
part? How does the OS react to the PCIe device vanishing from the bus
and then subsequently reappearing?
With the plain old PCI the PCI core needs to be configured first
(memory addresses etc). It has been too long since I worked with PCI
and FPGAs but IIRC the OS should probe the card before it can be used.
The proper sequence is to stop the driver, reconfigure the FPGA, force
probing for hardware changes and then reload the driver.

--
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
--------------------------------------------------------------
 
On 5/5/2011 12:30 AM, Nico Coesel wrote:
Symon<symon_brewer@hotmail.com> wrote:

On 5/2/2011 1:42 PM, John Adair wrote:
If you didn't see it already in our our newsletter we have a new PCIe
devopment board based on an Altera Cyclone-IV GX. The new board keeps
most of the mechanicals and features of our Raggedstone product range
but extends the bandwidth capability of the product range. The
Raggedstone3 is capabile of bandwidths exceeding 800 MBytes/s over
it's X4 PCIe interface.

Initial details of this product http://www.enterpoint.co.uk/raggedstone/raggedstone3.html.
Anyone at ESC this week can see the board there on our stand.

I am expecting this board to ship to customers in low numbers in June
or July with a significant ramp in shipping numbers after that.

John Adair
Enterpoint Ltd.

Hi John,

I have a question for you (and the group) about PCIe. Let's say I build
a PCIe target in my Altera device, and let's say for the sake of
argument that it's a Ethernet MAC. My Linux single board computer (SBC)
has a software driver for this Ethernet device. As the Linux boots, it
sees the PCIe device and loads the driver.

What happens if, without rebooting the SBC, I reconfigure the Altera
part? How does the OS react to the PCIe device vanishing from the bus
and then subsequently reappearing?

With the plain old PCI the PCI core needs to be configured first
(memory addresses etc). It has been too long since I worked with PCI
and FPGAs but IIRC the OS should probe the card before it can be used.
The proper sequence is to stop the driver, reconfigure the FPGA, force
probing for hardware changes and then reload the driver.

Hi Nico,
So, if the OS initiates the FPGA reconfiguration, it can also reboot the
driver?
Thanks, Symon
 
Symon

This isn't a simple area and one of the places that the PCIe spec
usually falls down. Usually if you reconfigure the device sitting the
PCIe bus this is a problem because the bios and the OS don't that you
are doing this. Consequently if an access is attempted during the
configuration many motherboards will freeze because an answer doesn't
come back. The second problem is that the enumeration and setting of
the card parameters is lost. Sometimes there are work arounds to this
later problem the best of which is an OS that be forced to re-
enumerate the target. One way to get round the problem is to use hot
plug signalling but that does depend on the motherboard and OS if that
is supported.

Using a partially configuration technique can sometimes work as well
but again it is not a simple path.

John Adair
Enterpoint Ltd.

On May 4, 4:43 pm, Symon <symon_bre...@hotmail.com> wrote:
On 5/2/2011 1:42 PM, John Adair wrote:

If you didn't see it already in our our newsletter we have a new PCIe
devopment board based on an Altera Cyclone-IV GX. The new board keeps
most of the mechanicals and features of our Raggedstone product range
but extends the bandwidth capability of the product range. The
Raggedstone3 is capabile of bandwidths exceeding 800 MBytes/s over
it's X4 PCIe interface.

Initial details of this producthttp://www.enterpoint.co.uk/raggedstone/raggedstone3.html.
Anyone at ESC this week can see the board there on our stand.

I am expecting this board to ship to customers in low numbers in June
or July with a significant ramp in shipping numbers after that.

John Adair
Enterpoint Ltd.

Hi John,

I have  a question for you (and the group) about PCIe. Let's say I build
a PCIe target in my Altera device, and let's say for the sake  of
argument that it's a Ethernet MAC. My Linux single board computer (SBC)
has a software driver for this Ethernet device. As the Linux boots, it
sees the PCIe device and loads the driver.

What happens if, without rebooting the SBC, I reconfigure the Altera
part? How does the OS react to the PCIe device vanishing from the bus
and then subsequently reappearing?

Thanks, Symon.
 
Symon <symon_brewer@hotmail.com> wrote:

On 5/5/2011 12:30 AM, Nico Coesel wrote:
Symon<symon_brewer@hotmail.com> wrote:

On 5/2/2011 1:42 PM, John Adair wrote:
If you didn't see it already in our our newsletter we have a new PCIe
devopment board based on an Altera Cyclone-IV GX. The new board keeps
most of the mechanicals and features of our Raggedstone product range
but extends the bandwidth capability of the product range. The
Raggedstone3 is capabile of bandwidths exceeding 800 MBytes/s over
it's X4 PCIe interface.

Initial details of this product http://www.enterpoint.co.uk/raggedstone/raggedstone3.html.
Anyone at ESC this week can see the board there on our stand.

I am expecting this board to ship to customers in low numbers in June
or July with a significant ramp in shipping numbers after that.

John Adair
Enterpoint Ltd.

Hi John,

I have a question for you (and the group) about PCIe. Let's say I build
a PCIe target in my Altera device, and let's say for the sake of
argument that it's a Ethernet MAC. My Linux single board computer (SBC)
has a software driver for this Ethernet device. As the Linux boots, it
sees the PCIe device and loads the driver.

What happens if, without rebooting the SBC, I reconfigure the Altera
part? How does the OS react to the PCIe device vanishing from the bus
and then subsequently reappearing?

With the plain old PCI the PCI core needs to be configured first
(memory addresses etc). It has been too long since I worked with PCI
and FPGAs but IIRC the OS should probe the card before it can be used.
The proper sequence is to stop the driver, reconfigure the FPGA, force
probing for hardware changes and then reload the driver.

Hi Nico,
So, if the OS initiates the FPGA reconfiguration, it can also reboot the
driver?
Most modern OSses support run-time loading and unloading of device
drivers. The only real problem is writing the PCI configuration space.
The OS needs to support that but it is very similar to hotplugging
which IIRC is supported by PCIe.

This e-mail gives some useful pointers:

http://www.spinics.net/lists/linux-pci/msg08649.html

--
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
--------------------------------------------------------------
 

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