RACE condition detection

  • Thread starter jiang.walter.long@gmail.c
  • Start date
J

jiang.walter.long@gmail.c

Guest
I have a question about RACE condition detection.

Assume a good coding style:

1. complete sensitivity list

etc.

Will the simulator be smart enough to detect all the RACE condition
during simulation?

-Jiang
 
VCS has a "+race" option which will create a race file that shows nets
that have multiple updates within a single time slice. Other vendors
should have similar facilities.

Good coding style will prevent most race conditions, but not totally
ensure that you won't have any race conditions. Especially troublesome
blocks are : clock generators, gated clocks, gate level simulations
with # delays . . .

Good luck.

-Art
 

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