Questions about sending 'transaction attribute behavior acro

[R Paley]

With the MTI simulator version 5.7b, i notice the following with the
code snippet below:

-------------------------------------------------

Block block_a has the following code:

entity block_a is
port (
x_out : in x_rec_typ ; -- some record.
);
end entity block_a;

architecture bhv of block_a is
begin

main : process
begin
wait on x_out'transaction;
-- do something.
end process main;

end bhv;

Block block_b has the following code.

entity block_b is
port (
x_out : out x_rec_typ ; -- some record.
);
end entity block_b;

architecture bhv of block_b is

signal x_int : x_rec_typ;

begin

x_out <= x_int;

main : process
variable x_v : x_rec_typ;
begin

x_v.field_1 := 0 ;
x_v.field_2 := 1 ;

-- do some other things.

x_int <= x_v ;
end process main;

end bhv;

In a higher level, x_out of block_a is connected to x_out of block_b.

I expect the 'transaction of x_out in

I would expect the 'transaction attribute of x_out in block_a to
behave the
same as the 'transaction attribute of x_int in block_b, after all,
x_int is assigned to output port x_out. In the MTI simulator, version
5.7b, this does not occur. A 'transaction only occurs on x_out in
block_a when the value changes in block_b. So, the waveform's for
x_out'transaction in block_a DO NOT match the waveform for
x_int'transaction in block_b. Can anyone please explain to me why this
happens?

thank you very much.

 

[Mohammed khader]

Block block_a has the following code:

entity block_a is
port (
x_out : in x_rec_typ ; -- some record.
);
end entity block_a;

architecture bhv of block_a is
begin

main : process
begin
wait on x_out'transaction;
-- do something.
end process main;

end bhv;

Block block_b has the following code.

entity block_b is
port (
x_out : out x_rec_typ ; -- some record.
);
end entity block_b;

architecture bhv of block_b is

signal x_int : x_rec_typ;

begin

x_out <= x_int;

main : process
variable x_v : x_rec_typ;
begin

x_v.field_1 := 0 ;
x_v.field_2 := 1 ;

-- do some other things.

x_int <= x_v ;
end process main;

end bhv;

In a higher level, x_out of block_a is connected to x_out of block_b.

I expect the 'transaction of x_out in

I would expect the 'transaction attribute of x_out in block_a to
behave the
same as the 'transaction attribute of x_int in block_b, after all,
x_int is assigned to output port x_out. In the MTI simulator, version
5.7b, this does not occur. A 'transaction only occurs on x_out in
block_a when the value changes in block_b. So, the waveform's for
x_out'transaction in block_a DO NOT match the waveform for
x_int'transaction in block_b. Can anyone please explain to me why this
happens?

thank you very much.

Process main in block_b is not having any wiat statement or
sensitivity list ,hence it causes a infinite loop like structure(that
is it goes on executing the process body for infinite time at first
simulation cycle). Because of this x_int never gets the value of
variable x_v(that is x_int has its default value).

Almost every simulator gives a warning if a process doesn't have any
sensitivity list and wait statement, I dont know about your simulator.
Please try to give the complete code and a working model.

 

[Paul Uiterlinden]

R Paley wrote:

I would expect the 'transaction attribute of x_out in block_a to
behave the
same as the 'transaction attribute of x_int in block_b, after all,
x_int is assigned to output port x_out.

The signal assignment x_out <= x_int does not pass through transactions,
only events. So consecutive assignments of the same value on x_int will
cause only one transaction: the first time, which is an event as well at
the same time.

Paul.