Question on JFETs

C

Chris

Guest
Hi all,

I can't find much info on JFETs in my books which don't seem to go into
much depth. They go into much detail, however, on biasing them in the
*active* region. Why would anyone want to operate a JFET in the active
region??
I can understand why it's useful to operate such a FET in the *ohmic*
region where it can do something useful (like amplifying!) but AFAICS in
the active region it's good for nothing. Obviously I'm missing something.
Can some kind soul assist?

thanks.
 
On Tue, 08 Nov 2016 16:10:11 -0600, Tim Wescott wrote:

Who says they can't amplify in the active region? As amplifiers,
there's probably less distortion in the active region than ohmic.

I don't understand. In the active region they are fully saturated so
they're like either on or off; there's no in-between?
 
On Tuesday, November 8, 2016 at 5:31:42 PM UTC-5, Chris wrote:
On Tue, 08 Nov 2016 16:10:11 -0600, Tim Wescott wrote:

Who says they can't amplify in the active region? As amplifiers,
there's probably less distortion in the active region than ohmic.

I don't understand. In the active region they are fully saturated so
they're like either on or off; there's no in-between?

They operate like triode tubes except that they can handle AC as log as the drain voltage doesn't get too close to the gate voltage.

If you have the source ad the gate at the same voltage then it is in conduction, which could be called saturation. It will be at its Rdson within reason. Note that you cannot put alot of voltage to it or it will blow.

In an N channel device when you take the gate voltage negative with respect to the source it increases resistance. It is not exactly like a resistor because changes in drain to source voltage affect the current non-linearly, but for many cases it is linear enough that they can be use for example, for audio compression without much distortion and without a delta gain stage. I got a design for an amp that uses JFETs for clip proofing. I have not built it but in theory it should work fine. And the polarity is simply reversed for P channel JFETs, which have no equivalent i tubes.

Then when you get to the pinch off voltage, drain to source will act as an open circuit. This is the equivalent of a tube's cutoff voltage.

Most transistors cannot do that. Most of them will conduct forward bias collector to base and will destroy the transistor. Even the new ones like IGBTs and whatnot cannot handle AC linearly, or close thereto. And then some of them cannot be operated in the linear region at all because of their structure. There are also depletion mode MOSFETS available but they also will not operate linearly on AC from drain to source.

I find actual JFETs to be getting sparse in the market. If you go to like Digikey and see how many FETs they have and compare that with the actually JFETs they sell you will find them scarce.

As such, they might not be the best choice for new designs. They might get phased out completely in time. You will have to move a hell of alot of product to be able to get ONSEMI or whoever to keep making them, they want to sell what the market buys.

I actually have, at this time a design that makes a workaround really difficult. I have looked for JFETs and found that I am going to have to use like six pairs of them in parallel to do the job, and this is small signal. It's just that any other solution adds so much complexity it is almost not worth doing.

It is almost like tubes. Russians use tubes in the front end of RADAR arrays so they are less vulnerable to an EMP. But they do manufacture tubes and sell them worldwide now that most others have stopped. They serve the audiophile and professional music markets. Perhaps we can persuade them to make JFETs ?

But the bottom line is that JFETs can do things no other semiconductor can do. And it is not simple amplification.
 
On Tue, 08 Nov 2016 22:04:29 +0000, Chris wrote:

Hi all,

I can't find much info on JFETs in my books which don't seem to go into
much depth. They go into much detail, however, on biasing them in the
*active* region. Why would anyone want to operate a JFET in the active
region??
I can understand why it's useful to operate such a FET in the *ohmic*
region where it can do something useful (like amplifying!) but AFAICS in
the active region it's good for nothing. Obviously I'm missing
something.
Can some kind soul assist?

thanks.

Who says they can't amplify in the active region? As amplifiers, there's
probably less distortion in the active region than ohmic.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

I'm looking for work -- see my website!
 
In article <nvtjne$c08$4@dont-email.me>, cbx@noreply.com says...
On Tue, 08 Nov 2016 16:10:11 -0600, Tim Wescott wrote:

Who says they can't amplify in the active region? As amplifiers,
there's probably less distortion in the active region than ohmic.

I don't understand. In the active region they are fully saturated so
they're like either on or off; there's no in-between?

Active region is where you have enough voltage supplying the drain
, normally above the gate voltage, by biasing the gate voltage
you can select a constant current. In this mode if the voltage on the
drain increases for example, the darin current will remain the same per
gate bias. Gate/Source

Problem is that this active region really isn't very linear so it does
have specific needs or use.

WHen the voltage btween the drain and source come low enough to where
current can no long be maintain via the gate bias, it becomes ohmic.

when you hit the saturation level due to lack of drain/source voltage
the gate bias now makes the fet an ajustable R. Variable voltage at the
drain will simply make the ohmic fet behave like an R.

That is best I can explain it off the top of my head.

Jamie
 
On Tuesday, November 8, 2016 at 5:05:02 PM UTC-5, Chris wrote:
Hi all,

I can't find much info on JFETs in my books which don't seem to go into
much depth. They go into much detail, however, on biasing them in the
*active* region. Why would anyone want to operate a JFET in the active
region??
I can understand why it's useful to operate such a FET in the *ohmic*
region where it can do something useful (like amplifying!) but AFAICS in
the active region it's good for nothing. Obviously I'm missing something.
Can some kind soul assist?

thanks.

Do you have a copy of AoE (the 2nd ed. is enough) Jfets and fets are
close cousins and basically behave the same. (Jfets are like
depletion mode fets)

George H.
 
On 11/08/2016 05:31 PM, Chris wrote:
On Tue, 08 Nov 2016 16:10:11 -0600, Tim Wescott wrote:

Who says they can't amplify in the active region? As amplifiers,
there's probably less distortion in the active region than ohmic.

I don't understand. In the active region they are fully saturated so
they're like either on or off; there's no in-between?

Ancient terminology problem. "Saturated" for a BJT equals "ohmic" for a
FET. FET "saturated" equals "normal bias" for a BJT.

FET amplifiers are almost always in normal bias ("saturated"), so that
the transistor functions as a not-too-great current source instead of a
not-too-great resistor.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net
 
On Tue, 08 Nov 2016 22:31:10 +0000, Chris wrote:

On Tue, 08 Nov 2016 16:10:11 -0600, Tim Wescott wrote:

Who says they can't amplify in the active region? As amplifiers,
there's probably less distortion in the active region than ohmic.

I don't understand. In the active region they are fully saturated so
they're like either on or off; there's no in-between?

FET "saturation" and BJT "saturation" are two different things. A BJT is
saturated when the collector voltage is lower than the base voltage. A
FET is "saturated" when the drain current is relatively insensitive to
drain voltage. I cannot, for the life of me, remember what is
"saturated" in each of these two cases. Some digging around on the
Internet or (gasp!) in some good old 3rd-year circuits books should get
you answers.

So a FET in saturation acts like a BJT that is _out_ of saturation:
variations in drain voltage don't have a great effect on the drain
current, and the drain current is modulated by the gate-source voltage,
so you can make an amplifier by working the drain into some resistance.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

I'm looking for work -- see my website!
 
On Wed, 09 Nov 2016 06:07:59 -0800, George Herold wrote:

Do you have a copy of AoE (the 2nd ed. is enough) Jfets and fets are
close cousins and basically behave the same. (Jfets are like depletion
mode fets)

I have found that particular book to be one of the most confusing in this
regard. MOSFETs and JFETs are treated in the same section with the
narrative switching from one to the other most times without adequate
differentiation. They should have been treated *completely separately*
(not without comparison to each other though) but completely separately
nonetheless. It turns out that itty-bit of gate insulation MOSFETs have
makes for extreme confusion with JFETs if these devices are both treated
under the same heading; it's false economy.
 
On Wed, 09 Nov 2016 06:07:59 -0800, George Herold wrote:

> (Jfets are like depletion mode fets)

That sentence makes no grammatical sense to me at all.
 
On Wed, 9 Nov 2016 23:53:04 -0000 (UTC), Chris <cbx@noreply.com>
wrote:

On Wed, 09 Nov 2016 06:07:59 -0800, George Herold wrote:

(Jfets are like depletion mode fets)

That sentence makes no grammatical sense to me at all.

Jfets are like depletion mode _MOS_fets

Sounds like you should take up some other trade.

...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| STV, Queen Creek, AZ 85142 Skype: skypeanalog | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

I'm looking for work... see my website.
 
On Wednesday, November 9, 2016 at 6:53:36 PM UTC-5, Chris wrote:
On Wed, 09 Nov 2016 06:07:59 -0800, George Herold wrote:

(Jfets are like depletion mode fets)

That sentence makes no grammatical sense to me at all.

See figure 3.8 in AoE.
I haven't used a lot of jfet's so I'm not much of an authority.

I thought H&H did a good job of making clear what could be a confusing subject.

(I haven't used depletion mode fet's either... except playing around
with mkaing 'em into current sources.)

George H.
 
On Thursday, November 10, 2016 at 9:57:29 AM UTC-5, Jim Thompson wrote:
On Thu, 10 Nov 2016 06:38:32 -0800 (PST), George Herold
gherold@teachspin.com> wrote:

[snip]

See figure 3.8 in AoE.
I haven't used a lot of jfet's so I'm not much of an authority.

I thought H&H did a good job of making clear what could be a confusing subject.

(I haven't used depletion mode fet's either... except playing around
with mkaing 'em into current sources.)

George H.

I love it when microchip foundry processes include a depletion mode
MOSFET... they make fabulous kick-starters for bandgap references,
then disconnect from rail-induced current variations.
Hmm.. not sure I fully follow. Hey! You could write a book!
Phil's working on his second, you don't want a
snooty PhD leaving more of a legacy. :^)

George H.

...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| STV, Queen Creek, AZ 85142 Skype: skypeanalog | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

I'm looking for work... see my website.
 
On Thu, 10 Nov 2016 06:38:32 -0800 (PST), George Herold
<gherold@teachspin.com> wrote:

[snip]
See figure 3.8 in AoE.
I haven't used a lot of jfet's so I'm not much of an authority.

I thought H&H did a good job of making clear what could be a confusing subject.

(I haven't used depletion mode fet's either... except playing around
with mkaing 'em into current sources.)

George H.

I love it when microchip foundry processes include a depletion mode
MOSFET... they make fabulous kick-starters for bandgap references,
then disconnect from rail-induced current variations.

...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| STV, Queen Creek, AZ 85142 Skype: skypeanalog | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

I'm looking for work... see my website.
 
On Thu, 10 Nov 2016 09:02:34 -0800 (PST), George Herold
<gherold@teachspin.com> wrote:

On Thursday, November 10, 2016 at 9:57:29 AM UTC-5, Jim Thompson wrote:
On Thu, 10 Nov 2016 06:38:32 -0800 (PST), George Herold
gherold@teachspin.com> wrote:

[snip]

See figure 3.8 in AoE.
I haven't used a lot of jfet's so I'm not much of an authority.

I thought H&H did a good job of making clear what could be a confusing subject.

(I haven't used depletion mode fet's either... except playing around
with mkaing 'em into current sources.)

George H.

I love it when microchip foundry processes include a depletion mode
MOSFET... they make fabulous kick-starters for bandgap references,
then disconnect from rail-induced current variations.
Hmm.. not sure I fully follow. Hey! You could write a book!
Phil's working on his second, you don't want a
snooty PhD leaving more of a legacy. :^)

George H.

I'm more into trade secrets that pass on to the offspring >:-}

E.G. My most recent OpAmp model is a cryptic (but not encrypted)
equation whose coefficients are derived from unpublished calculations.

...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| STV, Queen Creek, AZ 85142 Skype: skypeanalog | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

I'm looking for work... see my website.
 
On Thu, 10 Nov 2016 06:38:32 -0800, George Herold wrote:

(I haven't used depletion mode fet's either... except playing around
with mkaing 'em into current sources.)

In that case, would they make good drivers for laser diodes, do you think?
 
On Thu, 10 Nov 2016 10:43:27 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:

On Thu, 10 Nov 2016 09:02:34 -0800 (PST), George Herold
gherold@teachspin.com> wrote:

On Thursday, November 10, 2016 at 9:57:29 AM UTC-5, Jim Thompson wrote:
On Thu, 10 Nov 2016 06:38:32 -0800 (PST), George Herold
gherold@teachspin.com> wrote:

[snip]

See figure 3.8 in AoE.
I haven't used a lot of jfet's so I'm not much of an authority.

I thought H&H did a good job of making clear what could be a confusing subject.

(I haven't used depletion mode fet's either... except playing around
with mkaing 'em into current sources.)

George H.

I love it when microchip foundry processes include a depletion mode
MOSFET... they make fabulous kick-starters for bandgap references,
then disconnect from rail-induced current variations.
Hmm.. not sure I fully follow. Hey! You could write a book!
Phil's working on his second, you don't want a
snooty PhD leaving more of a legacy. :^)

George H.


I'm more into trade secrets that pass on to the offspring >:-}

E.G. My most recent OpAmp model is a cryptic (but not encrypted)
equation whose coefficients are derived from unpublished calculations.

...Jim Thompson

Like this (-:

..SUBCKT OpAmpCore IN+ IN- OUT VP VN PARAMS: A=57.739m B=4.01
+ Q=4.319 Z=1.5915 H=1 L=1 RG=200K CC=1.5915nF SH=22 SL=22
G_GM VN OUT VALUE {A*SINH(B*TANH(Q*V(IN+,IN-)))}
R_RGL OUT VN {RG}
R_RGH N_1 OUT {RG}
C_CC OUT VN {CC}
G_GH OUT VN VALUE {Z*exp(10.3465*TANH(SH*(H-V(VP,OUT)))-9.6535)}
G_GL N_1 OUT VALUE {Z*exp(10.3465*TANH(SL*(L-V(OUT,VN)))-9.6535)}
E_ISOL N_1 VN VP VN 1
..ENDS OpAmpCore


...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| STV, Queen Creek, AZ 85142 Skype: skypeanalog | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

I'm looking for work... see my website.
 
On Thu, 10 Nov 2016 23:32:54 -0000 (UTC), Gunther Heiko Hagen
<guntherxxx@quantserve.de> wrote:

On Thu, 10 Nov 2016 06:38:32 -0800, George Herold wrote:

(I haven't used depletion mode fet's either... except playing around
with mkaing 'em into current sources.)

In that case, would they make good drivers for laser diodes, do you think?

They're "on" (current flow = IDSS) at VGS=0, if that rings your chime,
requiring a negative VGS to turn them off.

Where I've used them for bandgap "kick-starters", drain is tied to
VDD, gate to VSS, source to load (BG). When BG comes up it turns off
the kick-start current.

...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| STV, Queen Creek, AZ 85142 Skype: skypeanalog | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

I'm looking for work... see my website.
 
On Wed, 9 Nov 2016 23:51:09 -0000 (UTC), Chris <cbx@noreply.com>
wrote:

On Wed, 09 Nov 2016 06:07:59 -0800, George Herold wrote:

Do you have a copy of AoE (the 2nd ed. is enough) Jfets and fets are
close cousins and basically behave the same. (Jfets are like depletion
mode fets)

I have found that particular book to be one of the most confusing in this
regard.

AoE is brilliantly clear.

MOSFETs and JFETs are treated in the same section with the
narrative switching from one to the other most times without adequate
differentiation. They should have been treated *completely separately*

They behave very much alike: wiggling the gate voltage modulates the
conductivity of the source-drain channel.

(not without comparison to each other though) but completely separately
nonetheless. It turns out that itty-bit of gate insulation MOSFETs have
makes for extreme confusion with JFETs if these devices are both treated
under the same heading; it's false economy.

You seem to not understand fundamentals, like voltage and current. You
might consider backing up and getting the basics right; that will make
things like semiconductors easier to understand.


--

John Larkin Highland Technology, Inc

lunatic fringe electronics
 
>"You seem to not understand fundamentals, like voltage and >current. You might consider backing up and getting the >basics right; that will make things like semiconductors >easier to understand. "

Some will never understand. There might be something in the DNA of people who do, or those who make nuclear bombs, or whatever.

When I run across people who don't get it I use the headlight theory.

Your car has two headlights which pull(ed) 36 watts each, being three ohms or whatever. You put two of them in parallel it pulls 72 watts, double.

Then there are these little transistors that control the big transistors. That is how it works folks.
 

Welcome to EDABoard.com

Sponsor

Back
Top