question in cadence encounter design import.

[mali]

hi all, i am a beginner in using cadence tools, i am trying to use
cadence encounter tool for place and route.

i am stuck in the design import step. i have the gate level vhdl file
which i want to place and route.

i would like to know where to get the lef files and the timing which
the step requires.

any links orall the set up files anyone used will be really help ful to
me.

thanks,
Venkataraman.

 

[Paulbill]

mali wrote:

hi all, i am a beginner in using cadence tools, i am trying to use
cadence encounter tool for place and route.

i am stuck in the design import step. i have the gate level vhdl file
which i want to place and route.

i would like to know where to get the lef files and the timing which
the step requires.

any links orall the set up files anyone used will be really help ful to
me.

thanks,
Venkataraman.

The standard cell library that you used to get to the gate level netlist
should have an accompanying lef file/files. The place and route is all
dependent on the technology library used to synthesize your design.
Contact your library provider for the lef files that you need. The
timing info will come from the .libs themselves.

Paulbill