Question in adding signed Vs unsigned

[Rajat Mitra]

Hi,
Does anyone know what the hardware implementation differences are in the
MIPS instructions -
add and addu.
I understand that "add" causes overflow and "addu" doesn't as per the ISA
details. However in add -
add rd,rs1,rs2
rs1[31] and rs2[31] are treated as sign bits; while the actual numbers to be
added are rs1[30:0] and rs2[30:0].
Is it true that in -
addu rd,rs1,rs2
rs1[31:0] and rs2[31:0] are the actual numbers and no sign bits exist ??

Thanks,

Raj

--
Rajat Mitra
ChipWrights Inc.
2150 Washington Street
Newton, MA 02462

Tel - 617 928 3123

 

[Steven Sharp]

"Rajat Mitra" <rajsaima@comcast.net> wrote in message news:<Kf-cnS9JwoX1XfSiXTWJjg@comcast.com>...

Hi,
Does anyone know what the hardware implementation differences are in the
MIPS instructions -
add and addu.

I can't comment specifically on the MIPS instruction set, but I can
speculate. There is no difference between the hardware for signed and
unsigned addition in twos-complement. That is why we use twos-complement.
There are differences in what is considered overflow. In unsigned
addition, any carry out is an overflow. In signed twos-complement
addition, carry out happens any time two negative numbers are added, or a
negative is added to a positive and the result is positive. It does not
imply an overflow, which requires different logic to compute. Processors
with condition flags generally provide only one add instruction for signed
and unsigned addition, but provide both carry out and signed overflow
condition flags for it. The MIPS may have a different approach that calls
for separate instructions.

Processors also frequently have an add instruction that does not disturb
the carry flag. This allows incrementing the loop counter in a multiple
precision add loop, without disturbing the carry between words.