K
Kingfischer
Guest
Hello Everyone,
I have a question about VHDL If Statement. I have shown two examples below.
Kindly comment if they are same or not ....or how they are percieved.
If( fruit = (apple or orange or mango or banana)) then
If (( fruit=apple) or (fruit = orange) or (fruit = mango) or (fruit =banana))then
Hope to get some feedback
Kingfischer.
I have a question about VHDL If Statement. I have shown two examples below.
Kindly comment if they are same or not ....or how they are percieved.
If( fruit = (apple or orange or mango or banana)) then
If (( fruit=apple) or (fruit = orange) or (fruit = mango) or (fruit =banana))then
Hope to get some feedback
Kingfischer.