Quad-packs in LTSpice schematics?

J

Joerg

Guest
Hello All,


Is it possible to coax the schematic editor in LTSpice to place multiple
devices that are in the same package?

For example that would be a quad opamp or a logic chip such as the
CD4007. At least the pin numbers would have to vary accordingly.
Creating, say, six model versions of the CD4049UB to cover all contained
inverters with their correct pin numbers would make a real mess out of a
netlist for layout.

The reason I ask is that it is kind of cumbersome to have to draw a
schematic twice, once for real and another time for simulation. It would
be nicer to just use LTSpice right away. I did ask this question in the
Yahoo LTSpice forum but it yielded no answer. So I figured that this
community may be larger.

Regards, Joerg

http://www.analogconsultants.com
 
Joerg wrote:
Hello All,


Is it possible to coax the schematic editor in LTSpice to place
multiple devices that are in the same package?

For example that would be a quad opamp or a logic chip such as the
CD4007. At least the pin numbers would have to vary accordingly.
Creating, say, six model versions of the CD4049UB to cover all
contained inverters with their correct pin numbers would make a real
mess out of a netlist for layout.

The reason I ask is that it is kind of cumbersome to have to draw a
schematic twice, once for real and another time for simulation. It
would be nicer to just use LTSpice right away. I did ask this
question in the Yahoo LTSpice forum but it yielded no answer. So I
figured that this community may be larger.
Click to expand...
Its amazing what people will try and get for free. You want fries with
that as well?

Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
 
In article <outnd.19879$zx1.6292@newssvr13.news.prodigy.com>,
Joerg <notthisjoergsch@removethispacbell.net> wrote:
Hello All,


Is it possible to coax the schematic editor in LTSpice to place multiple
devices that are in the same package?
Click to expand...
I think it wouldn't be too hard to use LTSpice as the schematic capture
for a PCB layout with multiple parts per package. You would have to to
write a little bit of code to deal with the resulting netlist. LTSpice
allows just about any text in a reference designator.

You can call one part "U1A" and the next "U1B" and so on. Then a bit of
software could strip off the "A", "B" and etc and adjust the pin numbers
in the saved netlist. Texts could be used to hold the attributes of the
traces, so you can even include traces width and clearance values.

I think that this is a very worthy project.

--
--
kensmith@rahul.net forging knowledge
 
Hi Ken,

I think it wouldn't be too hard to use LTSpice as the schematic capture
for a PCB layout with multiple parts per package. You would have to to
write a little bit of code to deal with the resulting netlist. LTSpice
allows just about any text in a reference designator.

You can call one part "U1A" and the next "U1B" and so on. Then a bit of
software could strip off the "A", "B" and etc and adjust the pin numbers
in the saved netlist. Texts could be used to hold the attributes of the
traces, so you can even include traces width and clearance values.

I think that this is a very worthy project.
Click to expand...
Yes, it certainly would be but I am not much of a programmer. But I'll
probably experiment a little and when I figure something out I will post
about that.

Regards, Joerg

http://www.analogconsultants.com
 
In article <xXNnd.20180$zx1.16373@newssvr13.news.prodigy.com>,
Joerg <notthisjoergsch@removethispacbell.net> wrote:
Hi Ken,

I think it wouldn't be too hard to use LTSpice as the schematic capture
for a PCB layout with multiple parts per package. You would have to to
write a little bit of code to deal with the resulting netlist. LTSpice
allows just about any text in a reference designator.

You can call one part "U1A" and the next "U1B" and so on. Then a bit of
software could strip off the "A", "B" and etc and adjust the pin numbers
in the saved netlist. Texts could be used to hold the attributes of the
traces, so you can even include traces width and clearance values.

I think that this is a very worthy project.



Yes, it certainly would be but I am not much of a programmer. But I'll
probably experiment a little and when I figure something out I will post
about that.
Click to expand...
If you do a good job of documenting what needs to be done, you will be 90%
of the way towards the software needed. Getting someone to turn a good
discription into software shouldn't be too hard. Just don't ask for a
GUI.

--
--
kensmith@rahul.net forging knowledge
 
Joerg wrote:
Hi Kevin,

Its amazing what people will try and get for free. You want fries
with that as well?



Yes, garlic fries. And heavy on the dill, please.

This is not about getting a freebie. I do have properly purchased
schematic editing and simulation available but it requires finishing
the schematic and export part of it, generate the list, check that
the list is ok, then feed it into Spice and simulate. Works nicely
for me. No need to buy yet another product.

What I am looking for is something that skips the listing requirement
and also avoids having to draw parts of the circuit twice. LTSpice has
the advantage that I could ask clients to obtain it and then see for
themselves what the change of certain parameters does. Often there are
younger engineers who can benefit from that and gain more
understanding of how things work. Since they don't have to file a cap
ex request and wait for approval that would be a straightforward
process with a free product such as LTSpice. From what I have seen so
far LTSpice is a very decent product and since my designs often
contain PWM voltage conversion it is even more suitable. In case an
LT device is used, they've got almost all their products in there.
Click to expand...
I agree that it would be wonderful to have a one really good tool that
does simulation and pcb all in the one go. However, invariably, PCB guys
like different things in the schematic capture than simulation guys do,
so the captures end up being different. In my view, you will never
please both the pcb and design people in the one system, in this
universe anyway.

Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
 
Hi Kevin,

I agree that it would be wonderful to have a one really good tool that
does simulation and pcb all in the one go. However, invariably, PCB guys
like different things in the schematic capture than simulation guys do,
so the captures end up being different. In my view, you will never
please both the pcb and design people in the one system, in this
universe anyway.
Click to expand...
That's right. Although there ought to be a reasonable compromise
somewhere that avoids having to key in schematics twice. Most projects,
at least here on the US west coast work like this: Engineer designs,
simulates, tests and draws schematic. Then it is handed to the client or
boss for design review plus another review in a group. Afterwards a
netlist is compiled, checked and then sent off to the layout folks. The
layout is almost always farmed out and the layouter doesn't really care
about the schematic. He or she just wants a netlist and package sizes,
plus some guidance for critical stuff.

Regards, Joerg

http://www.analogconsultants.com
 
Hi Kevin,

Its amazing what people will try and get for free. You want fries with
that as well?
Click to expand...
Yes, garlic fries. And heavy on the dill, please.

This is not about getting a freebie. I do have properly purchased
schematic editing and simulation available but it requires finishing the
schematic and export part of it, generate the list, check that the list
is ok, then feed it into Spice and simulate. Works nicely for me. No
need to buy yet another product.

What I am looking for is something that skips the listing requirement
and also avoids having to draw parts of the circuit twice. LTSpice has
the advantage that I could ask clients to obtain it and then see for
themselves what the change of certain parameters does. Often there are
younger engineers who can benefit from that and gain more understanding
of how things work. Since they don't have to file a cap ex request and
wait for approval that would be a straightforward process with a free
product such as LTSpice. From what I have seen so far LTSpice is a very
decent product and since my designs often contain PWM voltage conversion
it is even more suitable. In case an LT device is used, they've got
almost all their products in there.

Regards, Joerg

http://www.analogconsultants.com
 
Not totally true anymore with highspeed designs [on the West Coast].

Quite often a schematic will contain constraints for lengths etc of traces.
The Engineer will place the contraints in the design, the PCB guy will lay
it out and then the Enginner/Signal Integrity guy will simulate using back
annotated PCB lengths/stubs.

The process is becoming more tightly coupled [and iterative] due to the
faster edge rates and clock speeds. Jitter is also becoming very important
so that margins have to be carefully watched.


"Joerg" <notthisjoergsch@removethispacbell.net> wrote in message
news:Cp9od.47873$QJ3.43343@newssvr21.news.prodigy.com...
Hi Kevin,

I agree that it would be wonderful to have a one really good tool that
does simulation and pcb all in the one go. However, invariably, PCB guys
like different things in the schematic capture than simulation guys do, so
the captures end up being different. In my view, you will never please
both the pcb and design people in the one system, in this universe anyway.


That's right. Although there ought to be a reasonable compromise somewhere
that avoids having to key in schematics twice. Most projects, at least
here on the US west coast work like this: Engineer designs, simulates,
tests and draws schematic. Then it is handed to the client or boss for
design review plus another review in a group. Afterwards a netlist is
compiled, checked and then sent off to the layout folks. The layout is
almost always farmed out and the layouter doesn't really care about the
schematic. He or she just wants a netlist and package sizes, plus some
guidance for critical stuff.

Regards, Joerg

http://www.analogconsultants.com
Click to expand...
 
Hi crzndog,

.

Quite often a schematic will contain constraints for lengths etc of traces.
The Engineer will place the contraints in the design, the PCB guy will lay
it out and then the Enginner/Signal Integrity guy will simulate using back
annotated PCB lengths/stubs.

The process is becoming more tightly coupled [and iterative] due to the
faster edge rates and clock speeds. Jitter is also becoming very important
so that margins have to be carefully watched.
Click to expand...
Yes, there are lots of critical layout. I had quite a few of those, too.
However, I always made sure that the layouter is experienced in this
stuff, knows why I don't want 90 degree bends and so on, and is local.
Or at least within reasonable driving distance. In Europe or Asia that
matters less because you can often hop on a fast train and in an hour
you are more than 100 miles down the 'road'.

Then I sit down with the layouter and a cup of coffee to hash out the
critical areas. This has worked well for really tricky RF designs. The
only problems I ever had were minimal. Once a layouter smoked a bit too
much. If it were pipe instead of cigarettes I wouldn't have minded.
Another had a cat and its sensitive nose didn't appreciate the fact that
we have dogs at home. When I came back from that one our dogs gave me
'the looks'.

Regards, Joerg

http://www.analogconsultants.com
 
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