Q, logic value 'X'

P

Pasacco

Guest
hi

During some debugging in my simulation, it is found that one signal is
'X' from the beginning (from time 0) until that signal has some value
(1 or 0).

What does this 'X' (forced unknown) imply?
Is it problematic?
Does it "always" meaning that the value is conflicting (from the
beginning)?

Thankyou in advance
 
hi

I think it is correct, as you wrote, that uninitialized signal drives
other signal, as the following warning message appears

Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the
result will be 'X'(es).

Thankyou for comment very much
 

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