PSS Analysis

[Stefan Joeres]

Hi alltogether,

(again) I'm experiencing weird differences between Cadence 4 and 5.
We're using some chip-manufacturer's system to do some layouts in their
technology using Cadence 4 and we do have Cadence 5 using the same
transistor-models to use on our local machines.

I created a ring-oscillator using our system and did the usual simulations
(transient to determine the frequency and then pss/pnoise to get the
phasenoise). After that I ported the schematic to the manufacturer's Cadence
4 and did the transient simulations, getting the same results than I got
locally (well - "nearly" ... some parameters may be different).

But I simply can't get the PSS to finish ... depending on my settings it
doesn't converge or creates some weired voltages that don't fit into the
transistor models (worst case I noticed in the log file was something about
100kV)...

Anybody has a clue on how to make sure that something that worked under
local Cadence 5 could also work under remote Cadence 4 ?
(the remote Cadence 4 is necessary to do the layout and backannotation,
which we can't do locally)

Any help would be greatly appreciated.

Sincerely,
Stefan

 

[F ogh]

Not so surprising because PSS has had a major revamp in spectre5.

You should save the final conditions (or even the final pss) generated
by spectre5 and give them to spectre4. If spectre4 doesn t stay on the
pss generated by spectre5 and blows up (numerical unstable) you can try
tricks with the integration method and the convergence tolerances.

Stefan Joeres wrote:

Hi alltogether,

(again) I'm experiencing weird differences between Cadence 4 and 5.
We're using some chip-manufacturer's system to do some layouts in their
technology using Cadence 4 and we do have Cadence 5 using the same
transistor-models to use on our local machines.

I created a ring-oscillator using our system and did the usual simulations
(transient to determine the frequency and then pss/pnoise to get the
phasenoise). After that I ported the schematic to the manufacturer's Cadence
4 and did the transient simulations, getting the same results than I got
locally (well - "nearly" ... some parameters may be different).

But I simply can't get the PSS to finish ... depending on my settings it
doesn't converge or creates some weired voltages that don't fit into the
transistor models (worst case I noticed in the log file was something about
100kV)...

Anybody has a clue on how to make sure that something that worked under
local Cadence 5 could also work under remote Cadence 4 ?
(the remote Cadence 4 is necessary to do the layout and backannotation,
which we can't do locally)

Any help would be greatly appreciated.

Sincerely,
Stefan