PSL (Sugar) tools & examples

[Andrew Mazin]

Hi All,

I am interested to learn PSL (Sugar). So, I have two questions:
1. Where can I find tools with PSL (Sugar) support?
2. Where can I find simple examples to start with?

Thanks,
- Andrew

 

[VhdlCohen]

I am interested to learn PSL (Sugar). So, I have two questions:
1. Where can I find tools with PSL (Sugar) support?
2. Where can I find simple examples to start with?
There are several companies that support PSL for simulation and formal

verification.
The following is not a complete list, but it includes Cadence, SafeLogic.se
(with ModelSim), and @HDL (athdl.com) with any simulator.

PSL/Sugar Tutorial - DVCon 2003 available at http://64.143.67.163/index.html
Structured Design Verification is an interesting document.

Of course you also have my PSL book that explains PSL and provides examples.
DvCon and HdlCon will have papers and tutorials on PSL.
Ben
----------------------------------------------------------------------------
Ben Cohen Publisher, Trainer, Consultant (310) 721-4830
http://www.vhdlcohen.com/ vhdlcohen@aol.com
Author of following textbooks:
* Using PSL/SUGAR with Verilog and VHDL
Guide to Property Specification Language for ABV, 2003 isbn 0-9705394-4-4
* Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn
0-9705394-2-8
* Component Design by Example ", 2001 isbn 0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
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[Bernard Deadman]

Andrew,

PSL is based on Sugar that was developed at IBM Research Labs in
Haifa, Israel. The folks there maintain a web page:

http://www.haifa.il.ibm.com/projects/verification/sugar/index.html

that includes links to an array of Sugar-based products.

The work of ours that Ben highlighted (thanks Ben!) is available
directly at:

www.sdvinc.com/PSL-Sugar_tutorial_pt5.pdf

This was one part of a half-day tutorial at DVCon this year. I'm not
sure of the copyright status of the other material, but as Ben points
out it's probably on the DVCon site. If you can't find links and
would like the presenters email addresses please email me - they won't
thank me for the deluge of spam if I put them up here!

Erich, Grant Martin and I worked on another introductory paper that's
available on the Haifa site at:

http://www.haifa.il.ibm.com/projects/verification/RB_Homepage/ps/Paper_80.pdf

And if you have access to recent Cadence documentation you might look
at their ABV documentation, and I'm sure they will have demo examples
etc.

All of the above will provide an overview, but a good textbook is also
a great place to start.

I hope this helps,

Bernard



vhdlcohen@aol.com (VhdlCohen) wrote in message news:<20030918135357.29599.00000012@mb-m15.aol.com>...

I am interested to learn PSL (Sugar). So, I have two questions:
1. Where can I find tools with PSL (Sugar) support?
2. Where can I find simple examples to start with?
There are several companies that support PSL for simulation and formal
verification.
The following is not a complete list, but it includes Cadence, SafeLogic.se
(with ModelSim), and @HDL (athdl.com) with any simulator.

PSL/Sugar Tutorial - DVCon 2003 available at http://64.143.67.163/index.html
Structured Design Verification is an interesting document.

Of course you also have my PSL book that explains PSL and provides examples.
DvCon and HdlCon will have papers and tutorials on PSL.
Ben
----------------------------------------------------------------------------
Ben Cohen Publisher, Trainer, Consultant (310) 721-4830
http://www.vhdlcohen.com/ vhdlcohen@aol.com
Author of following textbooks:
* Using PSL/SUGAR with Verilog and VHDL
Guide to Property Specification Language for ABV, 2003 isbn 0-9705394-4-4
* Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn
0-9705394-2-8
* Component Design by Example ", 2001 isbn 0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
------------------------------------------------------------------------------