PSL stmt embedded in VHDL: good tutorials somewhere?

E

Eric DELAGE

Guest
Hi,

Does someone know some good tutorials on the various PSL statements
which can be embedded in VHDL? The PSL specification gives me a lot of
frustration ;-)

Eric
 
On Tue, 05 Apr 2005 18:04:30 +0200, Eric DELAGE <"eric
UNDERSCORE delage AT yahoo DOT fr"> wrote:

Does someone know some good tutorials on the various PSL statements
which can be embedded in VHDL? The PSL specification gives me a lot of
frustration ;-)
There are several books (e.g. Ben Cohen's), and there's our
Golden Reference Guide which includes some tutorial material
and is more digestible than the spec:
(apologies for the long URL, and I hope I'll be forgiven for the
advertisement):

http://www.doulos.com/content/products/golden_reference_guides.php

--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services

Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK
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The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
actually the PSL lrm 1.1 is not so cryptic as compared to other ieee
std's. you can also post your psl problems and browse other related
posts at http://www.verificationguild.com
 

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