Programming Altera Devices

[ALuPin]

Hi newsgroup users,

can someone tell me how to define the programming time of a EP1C12 Cyclone
when using PL-BYTEBLASTER2 cable in comparison to PL-USB-BLASTER cable?

Thank you for your help.


Rgds

 

[Tim Hubberstey]

ALuPin wrote:

can someone tell me how to define the programming time of a EP1C12 Cyclone
when using PL-BYTEBLASTER2 cable in comparison to PL-USB-BLASTER cable?

Wrong newsgroup, try comp.arch.fpga.
--
Tim Hubberstey, P.Eng. . . . . . Hardware/Software Consulting Engineer
Marmot Engineering . . . . . . . VHDL, ASICs, FPGAs, embedded systems
Vancouver, BC, Canada . . . . . . . . . . . http://www.marmot-eng.com

 

[ALuPin]

Tim Hubberstey <bogus@bogusname.com> wrote in message news:<e0YDc.29232$E84.16282@edtnps89>...

ALuPin wrote:
can someone tell me how to define the programming time of a EP1C12 Cyclone
when using PL-BYTEBLASTER2 cable in comparison to PL-USB-BLASTER cable?

Wrong newsgroup? Why?
Does describing hardware not mean programming it sooner or later?

 

[Tim Hubberstey]

ALuPin wrote:

Tim Hubberstey <bogus@bogusname.com> wrote in message news:<e0YDc.29232$E84.16282@edtnps89>...

ALuPin wrote:

can someone tell me how to define the programming time of a EP1C12 Cyclone
when using PL-BYTEBLASTER2 cable in comparison to PL-USB-BLASTER cable?


Wrong newsgroup? Why?

First, because this group is for discussing the VHDL language and tools
directly related to the language. Check the FAQs for the charter (
http://www.eda.org/comp.lang.vhdl ). Details of programming hardware
does not fall under this definition, IMO. If all questions were
appropriate for all newsgroups, there would be no reason to have
anything other than one giant group instead of the hierarchy of groups
that does exist.

Second, because, presumably, you want an answer to your question.
comp.arch.fpga is a better venue for getting an answer because you have
a broader base of people who are specifically interested in FPGAs.

Does describing hardware not mean programming it sooner or later?

Actually, no it doesn't. FPGA/CPLD devices are only a subset of the
hardware developed using VHDL. I have written thousands of lines of VHDL
(for ASICs) that have never passed through any kind of programmer. And
then there's the 60% of the total code that is used for verification
that isn't even synthesizable.
--
Tim Hubberstey, P.Eng. . . . . . Hardware/Software Consulting Engineer
Marmot Engineering . . . . . . . VHDL, ASICs, FPGAs, embedded systems
Vancouver, BC, Canada . . . . . . . . . . . http://www.marmot-eng.com

 

[ALuPin]

First, because this group is for discussing the VHDL language and tools
directly related to the language. Check the FAQs for the charter (
http://www.eda.org/comp.lang.vhdl ). Details of programming hardware
does not fall under this definition, IMO. If all questions were
appropriate for all newsgroups, there would be no reason to have
anything other than one giant group instead of the hierarchy of groups
that does exist.
I have seen a lot of persons asking in comp.arch.fpga and

comp.lang.vhdl
I experienced that these two newsgroups offer a better complete answer to me,
sometimes the one, sometimes the other - even in regard with
FPGA specific questions.

Second, because, presumably, you want an answer to your question.
Yes of course, but I did not get it in 'comp.arch.fpga' yet.
comp.arch.fpga is a better venue for getting an answer because you have
a broader base of people who are specifically interested in FPGAs.

Does describing hardware not mean programming it sooner or later?

Actually, no it doesn't. FPGA/CPLD devices are only a subset of the
hardware developed using VHDL. I have written thousands of lines of VHDL
(for ASICs) that have never passed through any kind of programmer. And
then there's the 60% of the total code that is used for verification
that isn't even synthesizable.