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The basic idea is that you put the FPGA in EXTEST and take control all theHi,
In my design, there is a flash memory chip connecting to fpga chip, I
want
to program the flash memory through the JTAG port on the FPGA, where can I
find some introduction?
I don't think it's possible to do this. The FPGA JTAG ports areHi,
In my design, there is a flash memory chip connecting to fpga chip, I want
to program the flash memory through the JTAG port on the FPGA, where can I
find some introduction?
Look at Jim's message. You can control all the IO's on the FPGA"rat" <rattt@col.edu.cn> wrote in message news:<c7ujmp$1phn$1@mail.cn99.com>...
Hi,
In my design, there is a flash memory chip connecting to fpga chip, I want
to program the flash memory through the JTAG port on the FPGA, where can I
find some introduction?
I don't think it's possible to do this. The FPGA JTAG ports are
dedicated to boundary scan, and in the case of CPLDs, are used for
device programming. You can't access the JTAG controller directly in
FPGA logic.
I guess rat might be interested to put the FPGA bitstream into theHowever, you could implement your own JTAG TAP controller in the FPGA
and wire that to the flash controller, and bring your JTAG signals out
on regular I/O pins.
Bassman59a@yahoo.com (Andy Peters) writes:
"rat" <rattt@col.edu.cn> wrote in message news:<c7ujmp$1phn$1@mail.cn99.com>...
Hi,
In my design, there is a flash memory chip connecting to fpga chip, I want
to program the flash memory through the JTAG port on the FPGA, where can I
find some introduction?
I don't think it's possible to do this. The FPGA JTAG ports are
dedicated to boundary scan, and in the case of CPLDs, are used for
device programming. You can't access the JTAG controller directly in
FPGA logic.
Look at Jim's message. You can control all the IO's on the FPGA
through the FPGA. Then you can apply patterns on the pins connected to
the flash to program it. In general you can do this with most JTAG
devices. I've programmed I2C proms through the JTAG port of on of our
ASICs. The tricky part is to generate the JTAG patterns to do the
programming.
However, you could implement your own JTAG TAP controller in the FPGA
and wire that to the flash controller, and bring your JTAG signals out
on regular I/O pins.
I guess rat might be interested to put the FPGA bitstream into the
flash in order to program the FPGA. In this case there is no loaded
FPGA on the board.
Petter
In the last issue of Xcell-Journal (49) there is an articleHi,
There's a tool called Universal Scan that does just what
you are looking for. http://www.universalscan.com/
I had some students using it at SJSU to program an Intel
Flash attached to a Spartan-IIE. I was impressed with
the tool.
Eric Crabill wrote:
Hi,
There's a tool called Universal Scan that does just what
you are looking for. http://www.universalscan.com/
I had some students using it at SJSU to program an Intel
Flash attached to a Spartan-IIE. I was impressed with
the tool.
In the last issue of Xcell-Journal (49) there is an article
about it. They call it "inexpensive" ;-)
But it costs more that the ChipScope, and that makes me wonder ;-)Hi,
I have no idea what it costs, the students were able
to make use of the downloadable demo version, and they
were even offered technical support when they ran into
trouble...
Anyway, I was thinking all the time, that such a tool would be
nice to have from xilinx. They have all the chip definitions in house
already, they sell you the needed JTAG dongles anyway, and have to
update the drivers, so getting something like the picoblaze to program
flash, shouldn't be a big thing. (My guess is, it would be a walk in the
park for Ken)
And as I have pretty much a PC for doing xilinx parts alone, so it
still works when I need it (no Word,outlook, no viruses,..) I really
try to cut the amount of different packages from diiferent vendors to
minimum.
Just my .2
Ah, neat! I didn't know you could do that. Learn something new every day...Bassman59a@yahoo.com (Andy Peters) writes:
"rat" <rattt@col.edu.cn> wrote in message news:<c7ujmp$1phn$1@mail.cn99.com>...
Hi,
In my design, there is a flash memory chip connecting to fpga chip, I want
to program the flash memory through the JTAG port on the FPGA, where can I
find some introduction?
I don't think it's possible to do this. The FPGA JTAG ports are
dedicated to boundary scan, and in the case of CPLDs, are used for
device programming. You can't access the JTAG controller directly in
FPGA logic.
Look at Jim's message. You can control all the IO's on the FPGA
through the FPGA. Then you can apply patterns on the pins connected to
the flash to program it. In general you can do this with most JTAG
devices. I've programmed I2C proms through the JTAG port of on of our
ASICs. The tricky part is to generate the JTAG patterns to do the
programming.
Hi,
In my design, there is a flash memory chip connecting to fpga chip, I want
to program the flash memory through the JTAG port on the FPGA, where can I
find some introduction?
Thanks a lot!
Regards
It may be pretty easy to do this. I've done a little research, it seems
there's a JTAG language called Serial Vector Format or SVF. Check out
XAPP503. It also appears that iMPACT can play something called XSVF format
files through the Xilinx JTAG cables. There's a utility included with
XAPP058 called SVF2XSVF. Mix together with some Perl scripts, piece of cake,
right? ;-)
Does this make sense? Am I on the right track? Anybody done anything
similar? Like to share your experiences?
Hi Petter,I've written my own software to program an fpga from an svf file. If
you want to program a flash isp using jtag you will need (in addition
to a svf parser) to parse the bsdl files for all the devices in the
scan chain as well. You should also read the netlist (edif in most
cases) or some other description of which pins are connected to the
flash.
I've done several versions. One was the pci bus (i.e. isp on a pci"Petter Gustad" <newsmailcomp6@gustad.com> wrote in message
news:874qq9dhoy.fsf@filestore.home.gustad.com...
I've written my own software to program an fpga from an svf file. If
you want to program a flash isp using jtag you will need (in addition
to a svf parser) to parse the bsdl files for all the devices in the
scan chain as well. You should also read the netlist (edif in most
cases) or some other description of which pins are connected to the
flash.
Hi Petter,
What did you use for the physical connection between your PC and JTAG
target? Or was it an embedded application?