Problems with NTE 4017B IC

[Jag Man]

I am implementing a circuit proposed by Chris in which a 555 IC feeds its
output
to a decade counter, 4017B IC. The output of the 555 looks as expected, but
nothing shows up at the output of the 4017. As suggested by Chris, I have
CLK (pin 14)
and Vss (8) at GRD, 12 VDC at Vdd (16), the output (pin 3) of the 555 going
to
CLKEN (13) of the 4017, and I am looking output 1 (pin 2) of the 4017. I see
nothing on the scope.

Any ideas as to what may be wrong? Perhaps CLKEN should be grounded and the
input
put to CLK?

One thing I notice is that the NTE 4017B has a "notch" depression at one end
and
a "circle" depression at the other. I am assuming that pin 1 is at the end
where the
notch is.


TIA

Ed

 

[peterken]

"Michael Black" <et472@FreeNet.Carleton.CA> wrote in message
news:cn6l13$cu6$1@theodyn.ncf.ca...

"Jag Man" (Jag_Man653R-E-MOVE@hotmail.com) writes:
I am implementing a circuit proposed by Chris in which a 555 IC feeds
its
output
to a decade counter, 4017B IC. The output of the 555 looks as expected,
but
nothing shows up at the output of the 4017. As suggested by Chris, I
have
CLK (pin 14)
and Vss (8) at GRD, 12 VDC at Vdd (16), the output (pin 3) of the 555
going
to
CLKEN (13) of the 4017, and I am looking output 1 (pin 2) of the 4017. I
see
nothing on the scope.

Any ideas as to what may be wrong? Perhaps CLKEN should be grounded and
the
input
put to CLK?

Since you wonder that, I wonder why you've got it wired the way you have
it?
The clock input is for the clock, the CLKEN is "clock enable". The way
you have it, it will never count.

Keep reset at ground, until you need to reset the counter (which in many
applications will be never). Keep the clocke enable low, unless you want
to disable the counting. Put the clock signal into the clock input.

Michael

One thing I notice is that the NTE 4017B has a "notch" depression at one
end
and
a "circle" depression at the other. I am assuming that pin 1 is at the
end
where the
notch is.


TIA

Ed

pin 14 is "positive" clock enable, or "positive" clock in (active high)
pin 13 is "negative" clock enable, or "negative" clock in (active low)
both are just "anded" internally, be it pin 13 is internally inverted, so
both can be used as clken
pin 8 as gnd
pin 16 as vcc
pin 15 is reset, set to gnd for operation

for correct pinout and data see
http://www.semiconductors.philips.com/acrobat_download/datasheets/HEF4017B_CNV_3.pdf

 

[Jag Man]

Since you wonder that, I wonder why you've got it wired the way you have
it?
The clock input is for the clock, the CLKEN is "clock enable". The way
you have it, it will never count.

I was just following orders, sir.

I'm a novice and a member of the group (Chris) showed it that way in the
diagram he kindly posted.

But, you're right. I switched them and grounded RESET and it works.

Thanks.

Ed

 

[Michael Black]

"Jag Man" (Jag_Man653R-E-MOVE@hotmail.com) writes:

I am implementing a circuit proposed by Chris in which a 555 IC feeds its
output
to a decade counter, 4017B IC. The output of the 555 looks as expected, but
nothing shows up at the output of the 4017. As suggested by Chris, I have
CLK (pin 14)
and Vss (8) at GRD, 12 VDC at Vdd (16), the output (pin 3) of the 555 going
to
CLKEN (13) of the 4017, and I am looking output 1 (pin 2) of the 4017. I see
nothing on the scope.

Any ideas as to what may be wrong? Perhaps CLKEN should be grounded and the
input
put to CLK?

Since you wonder that, I wonder why you've got it wired the way you have it?

The clock input is for the clock, the CLKEN is "clock enable". The way
you have it, it will never count.

Keep reset at ground, until you need to reset the counter (which in many
applications will be never). Keep the clocke enable low, unless you want
to disable the counting. Put the clock signal into the clock input.

Michael

One thing I notice is that the NTE 4017B has a "notch" depression at one end
and
a "circle" depression at the other. I am assuming that pin 1 is at the end
where the
notch is.


TIA

Ed

 

[R. Steve Walz]

Jag Man wrote:

I am implementing a circuit proposed by Chris in which a 555 IC feeds its
output
to a decade counter, 4017B IC. The output of the 555 looks as expected, but
nothing shows up at the output of the 4017. As suggested by Chris, I have
CLK (pin 14)
and Vss (8) at GRD, 12 VDC at Vdd (16), the output (pin 3) of the 555 going
to
CLKEN (13) of the 4017, and I am looking output 1 (pin 2) of the 4017. I see
nothing on the scope.

Any ideas as to what may be wrong? Perhaps CLKEN should be grounded and the
input
put to CLK?

One thing I notice is that the NTE 4017B has a "notch" depression at one end
and
a "circle" depression at the other. I am assuming that pin 1 is at the end
where the
notch is.

TIA

Ed
----------

*ALL* input pins MUST be pulled HI or LO to make digital logic circuits
work right, they do NOT default to some nominal value like HI or LO
without being connected.

-Steve
--
-Steve Walz rstevew@armory.com ftp://ftp.armory.com/pub/user/rstevew
Electronics Site!! 1000's of Files and Dirs!! With Schematics Galore!!
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