Problem with PCI cards

I

irum4

Guest
I have developed the PCI-device for which it is necessary 128 bytes of
ports of input-output, 512 Kb of memory and one interrupt.
When I install 4 devices simultaneously, BIOS allocates for them
necessary resources, windows 98 allocates resources only for 3
devices.
And Windows XP at all it does not want to be loaded ("Blue screen"
before installation of drivers).
 
Followup to: <bae769a6.0310060635.580b510c@posting.google.com>
By author: irum4@yahoo.com (irum4)
In newsgroup: comp.arch.fpga
I have developed the PCI-device for which it is necessary 128 bytes of
ports of input-output, 512 Kb of memory and one interrupt.
When I install 4 devices simultaneously, BIOS allocates for them
necessary resources, windows 98 allocates resources only for 3
devices.
And Windows XP at all it does not want to be loaded ("Blue screen"
before installation of drivers).
Click to expand...
Check through *all* the bits in the configuration space header to make
sure you match the specification.

-hpa
--
<hpa@transmeta.com> at work, <hpa@zytor.com> in private!
If you send me mail in HTML format I will assume it's spam.
"Unix gives you enough rope to shoot yourself in the foot."
Architectures needed: ia64 m68k mips64 ppc ppc64 s390 s390x sh v850 x86-64
 
H. Peter Anvin <hpa@zytor.com> wrote in message news:<blsls6$n8a$1@cesium.transmeta.com>...
Followup to: <bae769a6.0310060635.580b510c@posting.google.com
By author: irum4@yahoo.com (irum4)
In newsgroup: comp.arch.fpga


Check through *all* the bits in the configuration space header to make
sure you match the specification.

-hpa
Vendor ID & Device ID 0007524d
Click to expand...
Command &Status 02000187
04800000
00008000
0000bc01
f4400008
00000000
00000000
00000000
00000000
00000000
091e0000
00000000
00000000
00000000
00000103
 
irum4@yahoo.com (irum4) wrote in message news:<bae769a6.0310070210.68f12baa@posting.google.com>...
H. Peter Anvin <hpa@zytor.com> wrote in message news:<blsls6$n8a$1@cesium.transmeta.com>...
Followup to: <bae769a6.0310060635.580b510c@posting.google.com
By author: irum4@yahoo.com (irum4)
In newsgroup: comp.arch.fpga


Check through *all* the bits in the configuration space header to make
sure you match the specification.

-hpa
Vendor ID & Device ID 0007524d (0x00 Device/Vendor ID)
Command &Status 02000187 (0x04 Command/Status)
04800000 (0x08 Rev ID, Class Code)
00008000 (0x0c Cache line, Lat timer, Hdr, BIST)
0000bc01 (0x10 BAR0)
f4400008 (0x14 BAR1)
00000000 (0x18 BAR2)
00000000 (0x1c BAR3)
00000000 (0x20 BAR4)
00000000 (0x24 BAR5)
00000000 (0x28 Cardbus CIS ptr)
091e0000 (0x2c Subsystem/Subvendor ID)
00000000 (0x30 Exp ROM base)
00000000 (0x34 Cap. Ptr.)
00000000 (0x38 reserved)
00000103 (0x3c interrupt, grant, lat)
Click to expand...

Um,

You've got completely stupid values for BAR0 and BAR1. Go re-read the PCI spec.

--a
 
I've developed a couple of debuggers that run on Win98 and Win95
that let you look at (and modify) PCI config registers as well
as peek and poke locations in the different BAR address spaces.

Take a look at:
http://www.probo.com/debugger.htm

The original version, DBG.EXE, has a built-in Forth interpreter
that allows you to write sophisticated test scripts/programs
without having to learn how to map memory in the X86 architecture.

Unfortunately, Forth is like Pig-Latin to most people, so the newer
version of the code has an internal C interpeter to handle test
scripts/programs. The newer code is called (surprise) CDBG.

The original DBG gets little support or attention at this point.
If you use it and find a bug, I may or may not look into the
problem.

CDBG get more attention from me. I'll probably look at re-produceable
bugs that are reported to me. I already know that the C interpreter
tends to have occasional problems recovering from syntax errors and
accesses to pointers out-of-range.

Both tools have been VERY useful in helping me debug PCI cards.

We also have Linux and Win2k versions of CDBG, but these aren't for
public consumption yet.

John Providenza



Bassman59a@yahoo.com (Andy Peters) wrote in message news:<9a2c3a75.0310070910.62f902a9@posting.google.com>...
irum4@yahoo.com (irum4) wrote in message news:<bae769a6.0310070210.68f12baa@posting.google.com>...
H. Peter Anvin <hpa@zytor.com> wrote in message news:<blsls6$n8a$1@cesium.transmeta.com>...
Followup to: <bae769a6.0310060635.580b510c@posting.google.com
By author: irum4@yahoo.com (irum4)
In newsgroup: comp.arch.fpga


Check through *all* the bits in the configuration space header to make
sure you match the specification.

-hpa
Vendor ID & Device ID 0007524d (0x00 Device/Vendor ID)
Command &Status 02000187 (0x04 Command/Status)
04800000 (0x08 Rev ID, Class Code)
00008000 (0x0c Cache line, Lat timer, Hdr, BIST)
0000bc01 (0x10 BAR0)
f4400008 (0x14 BAR1)
00000000 (0x18 BAR2)
00000000 (0x1c BAR3)
00000000 (0x20 BAR4)
00000000 (0x24 BAR5)
00000000 (0x28 Cardbus CIS ptr)
091e0000 (0x2c Subsystem/Subvendor ID)
00000000 (0x30 Exp ROM base)
00000000 (0x34 Cap. Ptr.)
00000000 (0x38 reserved)
00000103 (0x3c interrupt, grant, lat)


Um,

You've got completely stupid values for BAR0 and BAR1. Go re-read the PCI spec.

--a
Click to expand...
 
The drivers for XP are different than the drivers for 98. If you put 3
boards in and it works how you want it then the boards and the hardware
design work. If you put in more boards and some don't work then you have a
driver problem. I can almost guarantee that you will need a new driver for
XP.

If you need any consulting let me know...

Steve



"irum4" <irum4@yahoo.com> wrote in message
news:bae769a6.0310060635.580b510c@posting.google.com...
I have developed the PCI-device for which it is necessary 128 bytes of
ports of input-output, 512 Kb of memory and one interrupt.
When I install 4 devices simultaneously, BIOS allocates for them
necessary resources, windows 98 allocates resources only for 3
devices.
And Windows XP at all it does not want to be loaded ("Blue screen"
before installation of drivers).
Click to expand...
 
Andy Peters <Bassman59a@yahoo.com> wrote in message
news:9a2c3a75.0310070910.62f902a9@posting.google.com...
Check through *all* the bits in the configuration space header to make
sure you match the specification.

-hpa
Vendor ID & Device ID 0007524d (0x00 Device/Vendor ID)
Command &Status 02000187 (0x04 Command/Status)
04800000 (0x08 Rev ID, Class Code)
00008000 (0x0c Cache line, Lat timer, Hdr, BIST)
0000bc01 (0x10 BAR0)
f4400008 (0x14 BAR1)

Um,
You've got completely stupid values for BAR0 and BAR1. Go re-read the PCI
spec.
--a
Click to expand...
_Are_ these completely stupid if the host has performed the
memory mapping configuration?

BAR0 is IO space mapped to 0xBC00

BAR1 is memory space which is pre-fetchable from
0xF4400000 to 0xF4800000


?


Nial Stewart
------------------------------------------------
Nial Stewart Developments Ltd
FPGA and High Speed Digital Design
www.nialstewartdevelopments.co.uk
 
Followup to: <3f84344a$0$10982$fa0fcedb@lovejoy.zen.co.uk>
By author: "Nial Stewart" <nial@spamno.nialstewart.co.uk>
In newsgroup: comp.arch.fpga
_Are_ these completely stupid if the host has performed the
memory mapping configuration?

BAR0 is IO space mapped to 0xBC00

BAR1 is memory space which is pre-fetchable from
0xF4400000 to 0xF4800000
Click to expand...
It's actually impossible to know without knowing what the powerup
values are and which bits are read/write. Just posting a snapshot in
time is pretty useless -- you need to go and check the proper
semantics of all your bits.

-hpa
--
<hpa@transmeta.com> at work, <hpa@zytor.com> in private!
If you send me mail in HTML format I will assume it's spam.
"Unix gives you enough rope to shoot yourself in the foot."
Architectures needed: ia64 m68k mips64 ppc ppc64 s390 s390x sh v850 x86-64
 
H. Peter Anvin <hpa@zytor.com> wrote in message
news:bm1siq$847$1@cesium.transmeta.com...
Followup to: <3f84344a$0$10982$fa0fcedb@lovejoy.zen.co.uk
By author: "Nial Stewart" <nial@spamno.nialstewart.co.uk
In newsgroup: comp.arch.fpga

_Are_ these completely stupid if the host has performed the
memory mapping configuration?

BAR0 is IO space mapped to 0xBC00

BAR1 is memory space which is pre-fetchable from
0xF4400000 to 0xF4800000


It's actually impossible to know without knowing what the powerup
values are and which bits are read/write. Just posting a snapshot in
time is pretty useless -- you need to go and check the proper
semantics of all your bits.
-hpa
Click to expand...
Aye, but they could be valid values after config OK, couldn't they?

I don't think Andy was correct in saying the BAR0 and BAR1 values
are completely stupid without more info.

?

Nial

------------------------------------------------
Nial Stewart Developments Ltd
FPGA and High Speed Digital Design
www.nialstewartdevelopments.co.uk
 
Followup to: <3f847c16$0$10988$fa0fcedb@lovejoy.zen.co.uk>
By author: "Nial Stewart" <nial@spamno.nialstewart.co.uk>
In newsgroup: comp.arch.fpga
Aye, but they could be valid values after config OK, couldn't they?

I don't think Andy was correct in saying the BAR0 and BAR1 values
are completely stupid without more info.
Click to expand...
The BAR0/1 values look plausible, yes.

-hpa



--
<hpa@transmeta.com> at work, <hpa@zytor.com> in private!
If you send me mail in HTML format I will assume it's spam.
"Unix gives you enough rope to shoot yourself in the foot."
Architectures needed: ia64 m68k mips64 ppc ppc64 s390 s390x sh v850 x86-64
 
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