problem with parameterized macros

[unfrostedpoptart]

Hi all.

I had a great idea that should be simple but I can't get it to work. Don't know if it's SV, me, or Cadence's implementation.

Here's the idea:
Given a parameter with the size of a signal, automatically declare the signal.

parameter A_SZ=5;
// this would generate
logic [4:0] a;
parameter B_SZ=1; // single bit
logic b;

My idea was this:
`define BITRANGE(size) (size)>1 ? [(size-1):0] : /* single bit */
logic `BITRANGE(A_SZ) a;

This is just giving lots of errors. I don't know if I need to quote/escape some of this or if it's not possible (at least in ncverilog). Any ideas?

I actually want to get fancier with a second, optional parameter:
`define BITRANGE(size,lsb=0) (size)>1 ? [(size+lsb-1):lsb] : /* single bit */
logic `BITRANGE(A_SZ,5) a; // expand to logic [9:5] a;

It doesn't look like ncverilog supports default values for macro parameters at all!

Thanks,

David

 

[Steven Sharp]

On Sep 3, 12:01 am, unfrostedpoptart <da...@therogoffs.com> wrote:

My idea was this:
`define BITRANGE(size)  (size)>1 ? [(size-1):0]  : /* single bit */
logic `BITRANGE(A_SZ) a;

This is just giving lots of errors.  I don't know if I need to quote/escape some of this or if it's not possible (at least in ncverilog).  Any ideas?

Macros are pure text substitution. Your ?: operator isn't going to be
evaluated by the macro substitution process to choose between two
pieces of text to insert; it will simply be inserted along with the
rest of the text. So your declaration will expand into

logic (A_SZ)>1 ? [(A_SZ-1):0] : a;

Which is completely invalid syntax.

I actually want to get fancier with a second, optional parameter:
`define BITRANGE(size,lsb=0)  (size)>1 ? [(size+lsb-1):lsb]  : /* single bit */
logic `BITRANGE(A_SZ,5) a;  // expand to logic [9:5] a;

It doesn't look like ncverilog supports default values for macro parameters at all!

I don't believe it does.

 

[unfrostedpoptart]

On Friday, September 2, 2011 9:26:16 PM UTC-7, Steven Sharp wrote:

On Sep 3, 12:01 am, unfrostedpoptart <da...@therogoffs.com> wrote:

My idea was this:
`define BITRANGE(size)  (size)>1 ? [(size-1):0]  : /* single bit */
logic `BITRANGE(A_SZ) a;

This is just giving lots of errors.  I don't know if I need to quote/escape some of this or if it's not possible (at least in ncverilog).  Any ideas?

Macros are pure text substitution. Your ?: operator isn't going to be
evaluated by the macro substitution process to choose between two
pieces of text to insert; it will simply be inserted along with the
rest of the text. So your declaration will expand into

logic (A_SZ)>1 ? [(A_SZ-1):0] : a;

Which is completely invalid syntax.

Thanks Steven. For some reason my brain had a blind spot and missed this.

I actually want to get fancier with a second, optional parameter:
`define BITRANGE(size,lsb=0)  (size)>1 ? [(size+lsb-1):lsb]  : /* single bit */
logic `BITRANGE(A_SZ,5) a;  // expand to logic [9:5] a;

It doesn't look like ncverilog supports default values for macro parameters at all!

I don't believe it does.