Problem with importing verilog netlist into SoC Encounter

[Dai Jiang]

Hi,

May I ask for your advice on a problem I am having with loading
verilog netlist into SoC Encounter?

I have a digital design built from schematic entry. The schematic was
built in Virtuoso with XFAB digital cells from D_CELLS library. I
wanted to import this design into SoC Encounter to do the layout,
therefore I used "Virtuoso Verilog Environment for NC_Verilog
Integration" to generate the verilog netlist from the schematic. In
the netlist, the digital cells were connected by position order, such
as

NO2X1 I70 ( nQ, SET, Q);
NO2X1 I71 ( Q, nQ, RESET);

However, this connection is not recognised by Encounter. Once I input
this netlist into Encounter, I got this error message:

**ERROR: (SOCVL-349): Missing module definition in netlist for
NO2X1.
**ERROR: (SOCVL-209): [./SR_latch_5V.v:16]: Parser does not handle
connection-by-position for this module.
at ,.
**ERROR: (SOCVL-349): Missing module definition in netlist for
NO2X1.
**ERROR: (SOCVL-209): [./SR_latch_5V.v:16]: Parser does not handle
connection-by-position for this module.
at ,.
**ERROR: (SOCVL-349): Missing module definition in netlist for
NO2X1.
**ERROR: (SOCVL-209): [./SR_latch_5V.v:16]: Parser does not handle
connection-by-position for this module.
at ).

Only when I changed the connection to connected by port name, the
process started working.

May I ask for your advices on the solution? Is there any method to
generate verilog netlist with ports connected by name? or Should I
modify the setting in Encounter?

Thank you very much!

Dai