problem with for loop

[rekz]

The problem is that with the following for loop I can't run the
simulation

for (i = 31; i >= 0; i = i - 1) begin
if(Reg1 == 0 && flag == 1)
Result <= Result + 1;
else
flag <= 0;

end

however if I change i >= 0 to i > 0 it works fine... why is this?

 

[Jonathan Bromley]

On Wed, 17 Mar 2010 13:26:03 -0700 (PDT), rekz wrote:

The problem is that with the following for loop I can't run the
simulation

for (i = 31; i >= 0; i = i - 1) begin
if(Reg1 == 0 && flag == 1)
Result <= Result + 1;
else
flag <= 0;

end

however if I change i >= 0 to i > 0 it works fine... why is this?

Try declaring 'i' to be an integer. You probably declared
it to be a reg. Unsigned regs cannot go negative.
--
Jonathan Bromley

 

[rekz]

On Mar 17, 1:39 pm, Jonathan Bromley <jonathan.brom...@MYCOMPANY.com>
wrote:

On Wed, 17 Mar 2010 13:26:03 -0700 (PDT), rekz wrote:
The problem is that with the following for loop I can't run the
simulation

for (i = 31; i >= 0; i = i - 1) begin
           if(Reg1 == 0 && flag == 1)
                           Result <= Result + 1;
                   else
                           flag <= 0;

           end

however if I change i >= 0 to i > 0 it works fine... why is this?

Try declaring 'i' to be an integer.  You probably declared
it to be a reg.  Unsigned regs cannot go negative.
--
Jonathan Bromley

I am trying to write a function that would result in the number of
leading zero in a 32 bit... and it is the following.
Why doesn't it work when I try it?

reg flag;
integer i;

flag = 1;
Result = 0;
for (i = 31; i >= 0; i = i - 1) begin
if(Reg1 == 0 && flag == 1)
Result = Result + 1;
else
flag = 0;

end

 

[Jonathan Bromley]

On Wed, 17 Mar 2010 21:42:44 -0700 (PDT), rekz wrote:

I am trying to write a function that would result in the number of
leading zero in a 32 bit... and it is the following.
Why doesn't it work when I try it?

reg flag;
integer i;

flag = 1;
Result = 0;
for (i = 31; i >= 0; i = i - 1) begin
if(Reg1 == 0 && flag == 1)
Result = Result + 1;
else
flag = 0;

end

I wish I could find a way of showing you how to debug
intelligently. That function body looks fine to me
(not a very efficient way to do it, but it should
certainly work). But you haven't shown us the function
declaration, nor the code that calls it. Both are
relevant. For example, it's a common error, when
writing a function that returns an integer, to forget
to declare the return type:

function Result (...);
Result = 37;
endfunction

No errors, but the returned result will be either
1 or 0 because the function is returning a one-bit
reg (the LSB of the integer value). It should be
function integer Result (...);

So, over to you. $display is your friend. The simulator
is your friend. Get into the habit of being suspicious
of everything. Accept that the problem is almost certainly
your fault, not Verilog's nor the tool's. Dumping a piece
of code on the newsgroup and saying "why doesn't it work?"
is just lazy; dig around in the problem until you have
narrowed it down somewhat. If you had used $display
thoughtfully on the piece of code you showed us, you
would probably have discovered that the problem lies
somewhere else - and you would be a long way towards
fixing it.

As you gain experience, you will probably find that you
can begin to "simulate in your head": look at a short
code fragment, and step through its execution in your
imagination, seeing what happens at each step. If you
can't yet do that, or if the code is too complex to do
that, exploit the features of Verilog and your tools -
single-stepping, $display (yes, I mention it again),
waveform viewers. It's all manageable.
--
Jonathan Bromley

 

[Cary R.]

Jonathan Bromley wrote:

So, over to you. $display is your friend. The simulator
is your friend. Get into the habit of being suspicious
of everything. Accept that the problem is almost certainly
your fault, not Verilog's nor the tool's. Dumping a piece
of code on the newsgroup and saying "why doesn't it work?"
is just lazy; dig around in the problem until you have
narrowed it down somewhat.

That's some excellent advice Jonathan! Learning how to effectively debug
a design in the language/environment of choice is a critical skill for
any engineer.

Cary