S
Steve
Guest
Hello all,
I have just started using Icarus. Had no problems compiling it and
installing gtkwave and getting both to work.
I have created a small ALU module to teach myself these tools. I know
this module works because I have tested it on Silos under windows.
Here is my problem when compiling it:
----------------------------------------
I use this hierarchy:
_______________________
| alu_testbench.v |
-------------------------
|
-----------------------------------------------
| | |
alu_bfm.v alu_watcher.v alu_core.v
alu_core.v contains the behavioral description
alu_watcher.v contains all the signals of interest so only that
particular module is used with the waveform viewer while verifying the
correctness. Can be safely eliminated
alu_bfm.v contains the stimulus to the module
alu_testbench.v simply contains an instantiation of all the three
modules. I have also included this code to obtain a .vcd dumpfile, in
the testbench:
initial
begin
$dumpvars;
$dumpfile ("alu.vcd");
end
initial
begin
$dumpon;
#2000 $dumpoff;
end
------------------------------------------
then I compile the module using:
Now when I inspect the alu.vcd file it is empty.
I compiled the same code with Silos under Windows and the .vcd dump
obtained from there was perfect and worked well with gtkwave.
I'm sure I am doing something wrong here when compiling the code, or I
have out the dump code in the wrong place.
Can I compile more than one modules using the -c option?
If I combine all the modules in one file, that will make managing
bigger projects very cumbersome. Is there a way in Icarus that we can
build/compile a whole project instead of a single file.
This is what happens when you have been pampered using Windows based
tools for too long
Please let me know if any other information is required.
I will appreciate any/all help with this.
Steve
I have just started using Icarus. Had no problems compiling it and
installing gtkwave and getting both to work.
I have created a small ALU module to teach myself these tools. I know
this module works because I have tested it on Silos under windows.
Here is my problem when compiling it:
----------------------------------------
I use this hierarchy:
_______________________
| alu_testbench.v |
-------------------------
|
-----------------------------------------------
| | |
alu_bfm.v alu_watcher.v alu_core.v
alu_core.v contains the behavioral description
alu_watcher.v contains all the signals of interest so only that
particular module is used with the waveform viewer while verifying the
correctness. Can be safely eliminated
alu_bfm.v contains the stimulus to the module
alu_testbench.v simply contains an instantiation of all the three
modules. I have also included this code to obtain a .vcd dumpfile, in
the testbench:
initial
begin
$dumpvars;
$dumpfile ("alu.vcd");
end
initial
begin
$dumpon;
#2000 $dumpoff;
end
------------------------------------------
then I compile the module using:
iverilog -cfiles (where the file "files" contains all three four
files mentioned above)
Which gives me a correct output on the screenvvp a.out
Now when I inspect the alu.vcd file it is empty.
I compiled the same code with Silos under Windows and the .vcd dump
obtained from there was perfect and worked well with gtkwave.
I'm sure I am doing something wrong here when compiling the code, or I
have out the dump code in the wrong place.
Can I compile more than one modules using the -c option?
If I combine all the modules in one file, that will make managing
bigger projects very cumbersome. Is there a way in Icarus that we can
build/compile a whole project instead of a single file.
This is what happens when you have been pampered using Windows based
tools for too long
Please let me know if any other information is required.
I will appreciate any/all help with this.
Steve