Problem simulating Xilinx CoreGenerator Cores with ModelSim

[Jeremy Webb]

Hi.

I'm having issues simulating my design that uses a Xilinx
CoreGenerator core. I imported the XilinxCoreLib directory, but
ModelSim doesn't recognize the files as a library. Does anyone know if
Xilinx provides a pre-compiled ModelSim library similar to those for
unisim and simprim? Or, has anyone successfully simulated a Xilinx
Core in VHDL, for example a fifo?

Thanks,

Jeremy

 

[Jeremy Webb]

jeremy.webb@ieee.org (Jeremy Webb) wrote in message news:<2bd56510.0410220956.712fd993@posting.google.com>...

Hi.

I'm having issues simulating my design that uses a Xilinx
CoreGenerator core. I imported the XilinxCoreLib directory, but
ModelSim doesn't recognize the files as a library. Does anyone know if
Xilinx provides a pre-compiled ModelSim library similar to those for
unisim and simprim? Or, has anyone successfully simulated a Xilinx
Core in VHDL, for example a fifo?

Thanks,

Jeremy

Hi.

Nevermind. I figured it out. To be able to use the Xilinx Core's in
ModelSim SE/PE you have to compile the XilinxCoreLib directory using
COMPXLIB either from the command line or within ISE Project Navigator.
The end result is a new directory with library information that
ModelSim SE/PE can interpret. Once I did this, I was able to simulate
all of my Xilinx cores correctly.

Thanks,

Jeremy