Problem in writing iterative relation between input and outp

[Farhana Sharmin Snigdha]

Hi all,
I am trying to write a code where there will be an 2D array of wire. Input of a module is one row of the wire and the corresponding output will be saved in the next row of the wire.

In HA module s[l][l-2] and c[l][l-2r[l] are two inputs. Corresponding outputs are r[l] and c[l+1][l-1]. Output r[l] is linked correctly but c[l+1][l-1] output is not. Same for FA1 case where both outputs are floating in the schematic.

This is more likely an iterative process similar to fibonacci series.
Out(0)=1;
Out(1)=2;
for (i=2;i<4;i=i+1)
Out(i)=Out(i-1)+Out(i-2);
end



module multipler(x,y,z)
.....
...
...code

wire [7:0][0:3]s,c;


....
....
...


genvar l,m;

generate
for (l=2;l<=2;l=l+1)begin:d
HA ha(s[l][l-2],c[l][l-2],r[l],c[l+1][l-1]);
for (m=l+1;m<=l+3;m=m+1)begin:e
FA1 fa( s[m][l-2] , pp[m][l+1 ], c[m][l-2] , c[m+1][l-1]);
end
assign s[l+4]=pp[l+4][l+1];

end
endgenerate

....
....
...
endmodule


module FA1(a,b,cin,s,cout);
input a,b,cin;
output s,cout;

assign s=a^b^cin;
assign cout=(a&b)|(b&cin)|(a&cin);
endmodule

module HA(a,b,s,cout);
input a,b;
output s,cout;

assign s=a^b;
assign cout=(a&b);

endmodule