printing out the scope of a module when istantiated

[Andy Luotto]

hi there
i'd like to display the istance name of a module as soon as a certain
condition occurs, something like this message

Warning! $readmem warning: words in file "VI.dat" less than that
given by address bounds
File: /prj/centog/USERS/stanzani/centog/adc/hdlmodel/
AMEAS8A00.v, line = 12939, pos = 45

Scope: :I_CENTOG:I_ADC.VIQ.IADC
Time: 0 FS + 34

or also inside a specify block ($setuphold provide the cell instance
name as soon as a violation occurs

I feel this is possible by using a system task like $scope or
something like that

could you advice please?

thanks

 

On Sep 10, 11:10 am, Andy Luotto <andyluo...@excite.com> wrote:

hi there
i'd like to display the istance name of a module as soon as a certain
condition occurs, something like this message

In a $display, or any of the other formatted output routines, a %m
format descriptor will print out the hierarchical name of the module
instance or scope where it appears.

 

[karthik]

SystemVerilog's %m specifier is very useful to display the callee
scope.

If your simulator supports __FILE__ and __LINE__ predefined macros,
then you can use them to display filename and line number.

-----
s = $psprintf("File:%s ; Line number:%0d", `__FILE__, `__LINE__);
$display("%s", s);
-----

AFAIK, Synopsys VCS supports it.

Thanks,
Karthik
www.nusym.com