J
Joe
Guest
Hi all,
Long time ago when I learn C, it was not allowed to put comments
after a #define statement. For example, the following statements
will fail in some old C compiler because the comments are included
as part of macro ABC:
#define ABC 123 // My test value
....
printf("%d\n", ABC);
This is now allowed to put the comment after #define in most modern
C compilers. But how about Verilog? Any Verilog compiler/simulator
could fail with this kind of coding? e.g. Is the following code allowed
in all Verilog tools?
`define ABC 123 // My test value
Thanks
Joe
Long time ago when I learn C, it was not allowed to put comments
after a #define statement. For example, the following statements
will fail in some old C compiler because the comments are included
as part of macro ABC:
#define ABC 123 // My test value
....
printf("%d\n", ABC);
This is now allowed to put the comment after #define in most modern
C compilers. But how about Verilog? Any Verilog compiler/simulator
could fail with this kind of coding? e.g. Is the following code allowed
in all Verilog tools?
`define ABC 123 // My test value
Thanks
Joe