Precision high-voltage pulse settling-time measurement

I needed to observe the detailed settling behavior of a precision
high-speed 250V->0V transition.

Simulation results predict this clamp settles to within 100mV
<200ps after a 5ns, 250V edge, permitting close observation of
the pulse's settling tail.


+12V
-+-
|
.-.
| | 2k
'-'
|
.---+---.
| |
V V SMS3925, 12 places
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
>----' +-------> to 'scope
|
.-.
| | 5.75k
'-'
|
-+-
-12v

Cheers,
James Arthur

 

[John Larkin]

On Thu, 26 Mar 2020 11:39:49 -0700 (PDT), dagmargoodboat@yahoo.com
wrote:

I needed to observe the detailed settling behavior of a precision
high-speed 250V->0V transition.

Simulation results predict this clamp settles to within 100mV
200ps after a 5ns, 250V edge, permitting close observation of
the pulse's settling tail.


+12V
-+-
|
.-.
| | 2k
'-'
|
.---+---.
| |
V V SMS3925, 12 places
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
----' +-------> to 'scope
|
.-.
| | 5.75k
'-'
|
-+-
-12v

Cheers,
James Arthur

What are your actual measurement goals?

I would expect that diode clamp to have all sorts of parasitics that
don't show up in simulation.

I had a horrible time with the scope monitor pickoff in my 1200 volt,
7 ns Pockels Cell driver. That might have been the hardest part.

--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

 

[Winfield Hill]

dagmargoodboat@yahoo.com wrote...

I needed to observe the detailed settling behavior
of a precision high-speed 250V->0V transition.

Simulation results predict this clamp settles to ...

Unequal diode-chain currents, and worse. Don't
trust your SPICE simulation, poor models, and
uncertain parasitics.

Make a simple low-distortion capacitive divider.
1:25, get the voltage down to the 10-volt region
where you can deal with it. Maybe clamp the
resistive output of the divider with Schottky
diodes.


--
Thanks,
- Win

 

[Phil Hobbs]

On 2020-03-26 16:02, Winfield Hill wrote:

dagmargoodboat@yahoo.com wrote...

I needed to observe the detailed settling behavior
of a precision high-speed 250V->0V transition.

Simulation results predict this clamp settles to ...

Unequal diode-chain currents, and worse. Don't
trust your SPICE simulation, poor models, and
uncertain parasitics.

Make a simple low-distortion capacitive divider.
1:25, get the voltage down to the 10-volt region
where you can deal with it. Maybe clamp the
resistive output of the divider with Schottky
diodes.

If James has a sampling scope, he only needs to divide down far enough
for the bridge to be safe. Those things are the bee's knees for
settling measurements because you don't peg the front end, so there's no
significant settling tail in the scope itself.

Cheers

Phil Hobbs


--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[George Herold]

On Thursday, March 26, 2020 at 2:40:01 PM UTC-4, dagmarg...@yahoo.com wrote:

I needed to observe the detailed settling behavior of a precision
high-speed 250V->0V transition.

Simulation results predict this clamp settles to within 100mV
200ps after a 5ns, 250V edge, permitting close observation of
the pulse's settling tail.


+12V
-+-
|
.-.
| | 2k
'-'
|
.---+---.
| |
V V SMS3925, 12 places
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
----' +-------> to 'scope
|
.-.
| | 5.75k
'-'
|
-+-
-12v

Cheers,
James Arthur

So why not a resistor divider pair?
George H.

 

[George Herold]

On Thursday, March 26, 2020 at 8:28:49 PM UTC-4, George Herold wrote:

On Thursday, March 26, 2020 at 2:40:01 PM UTC-4, dagmarg...@yahoo.com wrote:
I needed to observe the detailed settling behavior of a precision
high-speed 250V->0V transition.

Simulation results predict this clamp settles to within 100mV
200ps after a 5ns, 250V edge, permitting close observation of
the pulse's settling tail.


+12V
-+-
|
.-.
| | 2k
'-'
|
.---+---.
| |
V V SMS3925, 12 places
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
----' +-------> to 'scope
|
.-.
| | 5.75k
'-'
|
-+-
-12v

Cheers,
James Arthur

So why not a resistor divider pair?
George H.

Or if it's fast a capacitor divider chain?
GH

 

On Thursday, March 26, 2020 at 3:17:36 PM UTC-4, John Larkin wrote:

On Thu, 26 Mar 2020 11:39:49 -0700 (PDT), dagmargoodboat@yahoo.com
wrote:

I needed to observe the detailed settling behavior of a precision
high-speed 250V->0V transition.

Simulation results predict this clamp settles to within 100mV
200ps after a 5ns, 250V edge, permitting close observation of
the pulse's settling tail.


+12V
-+-
|
.-.
| | 2k
'-'
|
.---+---.
| |
V V SMS3925, 12 places
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
----' +-------> to 'scope
|
.-.
| | 5.75k
'-'
|
-+-
-12v


What are your actual measurement goals?

It's hard to state hard goals because the client simply always
asks for the best I can possibly do. But, the driving force is
a need to make sure the pulse *really* goes to zero volts as
quickly as possible. I infer that a few hundred mV ain't zero,
that's bad.

The operator has to tweak the load for best response, and I'm
figuring they'll need an honest 'scope pickoff to know when
they've succeeded.

I would expect that diode clamp to have all sorts of parasitics that
don't show up in simulation.

Probably. The construction's strays alone, for one. But I did think
putting the diode capacitances in series was fun.

I had a horrible time with the scope monitor pickoff in my 1200 volt,
7 ns Pockels Cell driver. That might have been the hardest part.

I'll probably use the classic 'scope divider in real life. I erred
by splitting the divider resistor in a 'scope monitor pickoff once.
I did it to get a higher voltage rating, but stray capacitance at
the join made a ghost settling tail, and a bit of tail-chasing to
find it.

Cheers,
James

 

On Thursday, March 26, 2020 at 8:28:49 PM UTC-4, George Herold wrote:

On Thursday, March 26, 2020 at 2:40:01 PM UTC-4, dagmarg...@yahoo.com wrote:
I needed to observe the detailed settling behavior of a precision
high-speed 250V->0V transition.

Simulation results predict this clamp settles to within 100mV
200ps after a 5ns, 250V edge, permitting close observation of
the pulse's settling tail.


+12V
-+-
|
.-.
| | 2k
'-'
|
.---+---.
| |
V V SMS3925, 12 places
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
V V
--- ---
| |
----' +-------> to 'scope
|
.-.
| | 5.75k
'-'
|
-+-
-12v

Cheers,
James Arthur

So why not a resistor divider pair?
George H.

I want to watch the settling tail in detail that a divider would
obscure, e.g., 250V->10mV in <5ns. This immediate situation was
a convenient thought-experiment because I'm measuring settling to
0.000V, but I wondered if, tossing ideas around in the ol' bean, I
might conjure up a way to watch settling to any arbitrary endpoint,
not just 0V.

It's probably overkill. But I don't know -- I'm going on qualitative
descriptions rather than defined requirements.

Cheers,
James

 

On Thursday, March 26, 2020 at 4:03:05 PM UTC-4, Winfield Hill wrote:

dagmargoodboat@yahoo.com wrote...

I needed to observe the detailed settling behavior
of a precision high-speed 250V->0V transition.

Simulation results predict this clamp settles to ...

Unequal diode-chain currents, and worse. Don't
trust your SPICE simulation, poor models, and
uncertain parasitics.

Make a simple low-distortion capacitive divider.
1:25, get the voltage down to the 10-volt region
where you can deal with it. Maybe clamp the
resistive output of the divider with Schottky
diodes.

Clamping is a 'maybe', I've considered that, but I'll have to do
some figuring. The divided node is going to be hi-Z, and even 1pF
stray on a 10k node (or 100k) would be ugly.

A conventional divider is almost certainly going to be ultimately
necessary though, since I'm charged with scaling this up to 3kV for
another effort.

Cheers,
James Arthur

 

[whit3rd]

On Thursday, March 26, 2020 at 7:07:39 PM UTC-7, dagmarg...@yahoo.com wrote:

It's hard to state hard goals because the client simply always
asks for the best I can possibly do. But, the driving force is
a need to make sure the pulse *really* goes to zero volts as
quickly as possible. I infer that a few hundred mV ain't zero,
that's bad.

A shorted delay line returns a pulse to zero pretty well
(lots of literature on this, related to proportional counters).
Look up 'delay line amplifier'.

 

On Thursday, March 26, 2020 at 4:42:45 PM UTC-4, Phil Hobbs wrote:

On 2020-03-26 16:02, Winfield Hill wrote:
dagmargoodboat@yahoo.com wrote...

I needed to observe the detailed settling behavior
of a precision high-speed 250V->0V transition.

Simulation results predict this clamp settles to ...

Unequal diode-chain currents, and worse. Don't
trust your SPICE simulation, poor models, and
uncertain parasitics.

Make a simple low-distortion capacitive divider.
1:25, get the voltage down to the 10-volt region
where you can deal with it. Maybe clamp the
resistive output of the divider with Schottky
diodes.

If James has a sampling scope, he only needs to divide down far enough
for the bridge to be safe. Those things are the bee's knees for
settling measurements because you don't peg the front end, so there's no
significant settling tail in the scope itself.

I've got a 7S14 in mothballs, which, with a new sampling battery,
would do. But effectively including the sampler front-end in the
product could be a convenience to the users, that's what I'm
day-dreaming about.

It's possible to non-electronically gauge the settling performance
by way of examining the load instrument's results. That's sensitive,
but rife with ambiguities and massively inconvenient.

Cheers,
James

 

[Flyguy]

On Thursday, March 26, 2020 at 7:59:38 PM UTC-7, dagmarg...@yahoo.com wrote:

On Thursday, March 26, 2020 at 10:46:30 PM UTC-4, whit3rd wrote:
On Thursday, March 26, 2020 at 7:07:39 PM UTC-7, dagmarg...@yahoo.com wrote:

It's hard to state hard goals because the client simply always
asks for the best I can possibly do. But, the driving force is
a need to make sure the pulse *really* goes to zero volts as
quickly as possible. I infer that a few hundred mV ain't zero,
that's bad.

A shorted delay line returns a pulse to zero pretty well
(lots of literature on this, related to proportional counters).
Look up 'delay line amplifier'.

It's an impedance-matching problem. The pulser is hellaciously
fast and clean at its output, but the load sends back reflections
when the output's impedance isn't perfectly matched. That's what
they're tweaking, guided by 'scope pickoff observations.

Cheers,
James Arthur

A quick google search turned up this:

https://digitalcommons.calpoly.edu/cgi/viewcontent.cgi?referer=https://www.google.com/&httpsredir=1&article=2186&context=theses

Have you even tried to do your own search?

 

On Thursday, March 26, 2020 at 10:46:30 PM UTC-4, whit3rd wrote:

On Thursday, March 26, 2020 at 7:07:39 PM UTC-7, dagmarg...@yahoo.com wrote:

It's hard to state hard goals because the client simply always
asks for the best I can possibly do. But, the driving force is
a need to make sure the pulse *really* goes to zero volts as
quickly as possible. I infer that a few hundred mV ain't zero,
that's bad.

A shorted delay line returns a pulse to zero pretty well
(lots of literature on this, related to proportional counters).
Look up 'delay line amplifier'.

It's an impedance-matching problem. The pulser is hellaciously
fast and clean at its output, but the load sends back reflections
when the output's impedance isn't perfectly matched. That's what
they're tweaking, guided by 'scope pickoff observations.

Cheers,
James Arthur

 

On Thursday, March 26, 2020 at 11:15:19 PM UTC-4, Flyguy wrote:

On Thursday, March 26, 2020 at 7:59:38 PM UTC-7, dagmarg...@yahoo.com wrote:
On Thursday, March 26, 2020 at 10:46:30 PM UTC-4, whit3rd wrote:
On Thursday, March 26, 2020 at 7:07:39 PM UTC-7, dagmarg...@yahoo.com wrote:

It's hard to state hard goals because the client simply always
asks for the best I can possibly do. But, the driving force is
a need to make sure the pulse *really* goes to zero volts as
quickly as possible. I infer that a few hundred mV ain't zero,
that's bad.

A shorted delay line returns a pulse to zero pretty well
(lots of literature on this, related to proportional counters).
Look up 'delay line amplifier'.

It's an impedance-matching problem. The pulser is hellaciously
fast and clean at its output, but the load sends back reflections
when the output's impedance isn't perfectly matched. That's what
they're tweaking, guided by 'scope pickoff observations.

Cheers,
James Arthur

A quick google search turned up this:

https://digitalcommons.calpoly.edu/cgi/viewcontent.cgi?referer=https://www.google.com/&httpsredir=1&article=2186&context=theses

Have you even tried to do your own search?

No, I didn't. The signal-to-noise ratio was too unlikely to be
worth it.

Your reference could be great for a newbie, for example, but
it's three orders of magnitude too slow, with an offset voltage
that's an order of magnitude larger than the signal I'm measuring.

I'm well familiar with conventional techniques.

I did review some old Jim Williams' app notes on instrumenting fast
op-amp settling times; those are always fun.


Cheers,
James Arthur

 

[Phil Hobbs]

On 2020-03-26 22:48, dagmargoodboat@yahoo.com wrote:

On Thursday, March 26, 2020 at 4:42:45 PM UTC-4, Phil Hobbs wrote:
On 2020-03-26 16:02, Winfield Hill wrote:
dagmargoodboat@yahoo.com wrote...

I needed to observe the detailed settling behavior
of a precision high-speed 250V->0V transition.

Simulation results predict this clamp settles to ...

Unequal diode-chain currents, and worse. Don't
trust your SPICE simulation, poor models, and
uncertain parasitics.

Make a simple low-distortion capacitive divider.
1:25, get the voltage down to the 10-volt region
where you can deal with it. Maybe clamp the
resistive output of the divider with Schottky
diodes.

If James has a sampling scope, he only needs to divide down far enough
for the bridge to be safe. Those things are the bee's knees for
settling measurements because you don't peg the front end, so there's no
significant settling tail in the scope itself.

I've got a 7S14 in mothballs, which, with a new sampling battery,
would do. But effectively including the sampler front-end in the
product could be a convenience to the users, that's what I'm
day-dreaming about.

It's possible to non-electronically gauge the settling performance
by way of examining the load instrument's results. That's sensitive,
but rife with ambiguities and massively inconvenient.

Cheers,
James

I have this design for a $2 single-diode sampler with 150-ps resolution
that I did with CW a few years ago. Haven't measured its sampling
artifacts down at the 100 ppm level, but it seems to work fine even
without a sampling loop.

(In single-diode samplers both ends of the sampling cap bounce all over
the place, so making a sampling loop is a bit of a puzzle.)

It would be fun to try putting it in something else. I should do that
one of these times.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Phil Hobbs]

On 2020-03-26 16:02, Winfield Hill wrote:

dagmargoodboat@yahoo.com wrote...

I needed to observe the detailed settling behavior
of a precision high-speed 250V->0V transition.

Simulation results predict this clamp settles to ...

Unequal diode-chain currents, and worse. Don't
trust your SPICE simulation, poor models, and
uncertain parasitics.

Make a simple low-distortion capacitive divider.
1:25, get the voltage down to the 10-volt region
where you can deal with it. Maybe clamp the
resistive output of the divider with Schottky
diodes.

Spherical cows rule! (Or is that 'roll'?)

Another approach would be to clamp the capacitive divider using a pHEMT
with a sliding gate pulse. You can turn those off in way under 100 ps
if your gate drive is quick enough, and the newer 18-GHz ones are much
faster than that. The drain-gate capacitance is very small.

JL says they make good diodes, so you could protect it by coupling the
pulse itself into the gate as well as the drain.

There would be a bit of DC offset, but nothing too hard to calibrate out.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

On Friday, March 27, 2020 at 11:50:33 AM UTC-4, Phil Hobbs wrote:

On 2020-03-26 22:48, dagmargoodboat@yahoo.com wrote:
On Thursday, March 26, 2020 at 4:42:45 PM UTC-4, Phil Hobbs wrote:
On 2020-03-26 16:02, Winfield Hill wrote:
dagmargoodboat@yahoo.com wrote...

I needed to observe the detailed settling behavior
of a precision high-speed 250V->0V transition.

Simulation results predict this clamp settles to ...

Unequal diode-chain currents, and worse. Don't
trust your SPICE simulation, poor models, and
uncertain parasitics.

Make a simple low-distortion capacitive divider.
1:25, get the voltage down to the 10-volt region
where you can deal with it. Maybe clamp the
resistive output of the divider with Schottky
diodes.

If James has a sampling scope, he only needs to divide down far enough
for the bridge to be safe. Those things are the bee's knees for
settling measurements because you don't peg the front end, so there's no
significant settling tail in the scope itself.

I've got a 7S14 in mothballs, which, with a new sampling battery,
would do. But effectively including the sampler front-end in the
product could be a convenience to the users, that's what I'm
day-dreaming about.

It's possible to non-electronically gauge the settling performance
by way of examining the load instrument's results. That's sensitive,
but rife with ambiguities and massively inconvenient.

Cheers,
James


I have this design for a $2 single-diode sampler with 150-ps resolution
that I did with CW a few years ago. Haven't measured its sampling
artifacts down at the 100 ppm level, but it seems to work fine even
without a sampling loop.

(In single-diode samplers both ends of the sampling cap bounce all over
the place, so making a sampling loop is a bit of a puzzle.)

It would be fun to try putting it in something else. I should do that
one of these times.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

My noodling on this started with a conventional sampler:

.------------.
| |
.--+--. |
| | |
V V |
--- --- |
| | |
Vi >----+ +------------> Vo
| | |
V V |
--- --- |
| | |
'--+--' |
| |
--. .-' |
)||( |
)||( |
)||( |
)||( |
--' '--------------'

Then I thought, heck, if I had a suitable 250V schottky
I wouldn't even need to sample -- I could chop off the
high-voltage portion entirely and go continuous-time.

Like, if we strapped some wings on a donkey, maybe it
could fly.

Cheers,
James Arthur