pre-layout simulation for lsi_10k netlist using ncvhdl

[Jim]

Hello. I am trying to simulate a gate-level netlist synthesized from
lsi_10k stdcell library using ncsim. However, ncvhdl cannot even
compile the libary file lsi_10k_FTGS.vhd, maybe because it is necessary
to setup some synopsys libraries first. Does anyone know how to do it?

Thanks,
Jim