PPC 405 communication with custom IP ml403

J

Jasim Khan

Guest
Hi Everyone!
I am trying to simulate a chemical reaction in FPGA.

My basic FPGA architecure consists of 3 processes:

-- Synchronous Process
--Purely Synchronous with asynchronous SET or RESET
IGNITE : PROCESS(clk, reset)
begin
IF( reset = '1' ) THEN --Synchronous Reset
Current_State <= ASSIGN_VARS;
ELSIF (clk'event AND clk = '1') THEN --Rising edge of Clock
Current_State <= Next_State;
END IF;
END PROCESS IGNITE;


CIRCUIT : PROCESS(Current_State,
-- And all other sensitivity list signals
) -- include the one read.
BEGIN
CASE Current_State IS
WHEN ASSIGN_VARS =>
-- LONG 3000 lines of code here
-- see the attached file
END CASE;
END PROCESS CIRCUIT;

--Purely Synchronous with asynchronous SET or RESET
INITIALIZE : PROCESS(clk, reset)
BEGIN
IF(reset = '1') THEN
glucose_reg <= zeros27;
ATP_reg <= zeros27;
glucose_6_phosphate_reg <= zeros27;
ADP_reg <= zeros27;
fructose_6_phosphate_reg <= zeros27;
fructose_1_6_bisphosphate_reg <= zeros27;
dihydroxyacetone_phosphate_reg <= zeros27;
glyceraldehyde_3_phosphate_reg <= zeros27;
bisphosphoglycerate_1_3_reg <= zeros27;
phosphoglycerate_3_reg <= zeros27;
phosphoglycerate_2_reg <= zeros27;
phosphoenolpyruvate_reg <= zeros27;
pyruvate_reg <= zeros27;
Pi_reg <= zeros27;
H2O_reg <= zeros27;
NAD_reg <= zeros27;
NADH_reg <= zeros27;
H_reg <= zeros27;
--BRAM
ADDRESS_A_reg <= zeros10;
DATA_IN_reg <= zeros27;
--
SAVE_DATA_reg <= zeros10;
TEMP_reg <= zeros5;
IN_REACTIONS_reg <= B"0";
TEMP_STATE_reg <= ASSIGN_VARS;
ELSIF(clk'event AND clk = '1') THEN
glucose_reg <= glucose_sig;
ATP_reg <= ATP_sig;
glucose_6_phosphate_reg <= glucose_6_phosphate_sig;
ADP_reg <= ADP_sig;
fructose_6_phosphate_reg <= fructose_6_phosphate_sig;
fructose_1_6_bisphosphate_reg <= fructose_1_6_bisphosphate_sig;
dihydroxyacetone_phosphate_reg <= dihydroxyacetone_phosphate_sig;
glyceraldehyde_3_phosphate_reg <= glyceraldehyde_3_phosphate_sig;
bisphosphoglycerate_1_3_reg <= bisphosphoglycerate_1_3_sig;
phosphoglycerate_3_reg <= phosphoglycerate_3_sig;
phosphoglycerate_2_reg <= phosphoglycerate_2_sig;
phosphoenolpyruvate_reg <= phosphoenolpyruvate_sig;
pyruvate_reg <= pyruvate_sig;
Pi_reg <= Pi_sig;
H2O_reg <= H2O_sig;
NAD_reg <= NAD_sig;
NADH_reg <= NADH_sig;
H_reg <= H_sig;
--BRAM
ADDRESS_A_reg <= ADDRESS_A_sig;
DATA_IN_reg <= DATA_IN_sig;
--
SAVE_DATA_reg <= SAVE_DATA;
TEMP_reg <= TEMP_sig;
TEMP_STATE_reg <= TEMP_STATE_sig;
IN_REACTIONS_reg <= IN_REACTIONS_sig;
END IF;
END PROCESS INITIALIZE;

I can communicate with this IP from PPC but in a very strange way.

#include "xmk.h"
#include "sys/init.h"
#include "platform.h"
#include <stdio.h>
#include <string.h>
#include "platform.h"
#include "xparameters.h"
#include "xbasic_types.h"
#include "xstatus.h"
#include "xgpio.h"
#include "source.h"
#include <sys/timer.h>
#include "checkppc6.h"

#include <stdio.h>
Xuint32 *baseaddr_p = (Xuint32 *)XPAR_CHECKPPC6_0_BASEADDR;
int main()
{
init_platform();
XASSERT_NONVOID(baseaddr_p != XNULL);
baseaddr = (Xuint32)baseaddr_p;
CHECKPPC6_mReset(baseaddr);
CHECKPPC6_mResetReadFIFO(baseaddr);
CHECKPPC6_mResetWriteFIFO(baseaddr);

CHECKPPC6_mWriteToFIFO(baseaddr, 0, 0xffffffff); // activate signal

DataFPGA = CHECKPPC6_mReadFromFIFO(baseaddr, 0);

}

I donot see the initial value from FPGA IP until I send an empty useless value to IP input (which is CHECKPPC6_mWriteToFIFO(baseaddr, 0, 0xffffffff); // activate signal). In my view a simple software reset (CHECKPPC6_mReset) should have initialized the IP and given me the output value I assign in ASSIGN_VARS case of my IP.

My IP design is such that. IP asks the input of chemical molecules. then perform reaction and wait for ACK signal from PPC to continue with the next round.

But the problems I face are. I have to (CHECKPPC6_mWriteToFIFO(baseaddr, 0, 0xffffffff); // activate signal) for no intuitive reason. Then when I provide ACK signal, IP doesnt move on to start Reaction again untill I provide another dummy input (CHECKPPC6_mWriteToFIFO(baseaddr, 0, 0xffffffff); // activate signal).

I believe next_state doesnot get updated, which is why it happens, can you guys please help me with this and suggest a solution.

please see attached files for more info.


https://drive.google.com/file/d/0BxVHCJ7JxzSDa3lHb3YxdmhTLTA/edit?usp=sharing
 

Welcome to EDABoard.com

Sponsor

Back
Top