power calculation in fpga

[sunil]

hi,
i designed decoder in vhdl and i am going to map that on vertex-II
xilinx FPGA. Can any body have the idea how to calculate the power
consumption in that design.
thanking u all.

 

[Benjamin Todd]

if you look on the Xilinx web-site they have power calculation tools, you
need to know the resources used and the clock frequency, as far as I can
remember.
Ben

"sunil" <inaganti_suni@yahoo.com> wrote in message
news:9f28d282.0402092133.2190279@posting.google.com...

hi,
i designed decoder in vhdl and i am going to map that on vertex-II
xilinx FPGA. Can any body have the idea how to calculate the power
consumption in that design.
thanking u all.

 

[Brendan Cullen]

Here is the particular area on Xilinx's web-site :
http://www.xilinx.com/ise/power_tools/.

Xilinx provides 2 types of power estimation tools - pre-implementation
(Spreadsheet and Web) and design-based (XPower).

Both pre-implementation tools are directly accessible from the above site
and, as Benjamin points out, require resource and frequency i/ps from the
users.

XPower comes as part of ISE and requires a design that has been at least
mapped. (It also operates on a placed design or on a placed & routed
design.)

All three tools support V2.

Regards,

Brendan

Benjamin Todd wrote:

if you look on the Xilinx web-site they have power calculation tools, you
need to know the resources used and the clock frequency, as far as I can
remember.
Ben

"sunil" <inaganti_suni@yahoo.com> wrote in message
news:9f28d282.0402092133.2190279@posting.google.com...
hi,
i designed decoder in vhdl and i am going to map that on vertex-II
xilinx FPGA. Can any body have the idea how to calculate the power
consumption in that design.
thanking u all.