plotting internal verilog-A signals

[danmc]

I have a verilog-A model with

electrical foo;

but foo does not connect directly to a pin on the module. Is there a
way to plot v("foo")? I tried looking in the results browser in analog
artist but didn't see it.

Thanks
-Dan

 

[Andrew Beckett]

On 6 May 2006 20:58:11 -0700, "danmc" <spam@mcmahill.net> wrote:

I have a verilog-A model with

electrical foo;

but foo does not connect directly to a pin on the module. Is there a
way to plot v("foo")? I tried looking in the results browser in analog
artist but didn't see it.

Thanks
-Dan

You'd either need to save all voltages, or use the nestlvl option to
control hierarchy levels to ensure that voltages within the module
are saved.

Regards,

Andrew.
Andrew Beckett
Principal European Technology Leader
Cadence Design Systems, UK.