PLL basics question

[ralph sansbury]

I can see how an increased reverse bias voltage on a diode in
a PLL circuit reduces the capacitance C in an LC oscillator and
so the frequency and how an RC circuit can delay the start and
extend the finish of a square wave oscillation but the simple
explanations I have seen of the PLL circuit refer only to the
change in capacitance of the LC oscillator and so to the change
in frequency and that this somehow could produce just a change in
phase.
What is a good simple but thorough explanation here?

 

[John Popelish]

ralph sansbury wrote:

I can see how an increased reverse bias voltage on a diode in
a PLL circuit reduces the capacitance C in an LC oscillator and
so the frequency and how an RC circuit can delay the start and
extend the finish of a square wave oscillation but the simple
explanations I have seen of the PLL circuit refer only to the
change in capacitance of the LC oscillator and so to the change
in frequency and that this somehow could produce just a change in
phase.
What is a good simple but thorough explanation here?

If you raise the frequency a little, and then, before you accumulate a
net cycle, lower it back to where it started, you will have changed
the phase of the wave. This could happen in a single cycle or over
some number of cycles.

Makes no difference whether the oscillator is LC or RC.
--
John Popelish

 

[Baphomet]

"ralph sansbury" <sansbury@bestweb.net> wrote in message
news:vm3po3h431cje0@corp.supernews.com...

I can see how an increased reverse bias voltage on a diode in
a PLL circuit reduces the capacitance C in an LC oscillator and
so the frequency and how an RC circuit can delay the start and
extend the finish of a square wave oscillation but the simple
explanations I have seen of the PLL circuit refer only to the
change in capacitance of the LC oscillator and so to the change
in frequency and that this somehow could produce just a change in
phase.
What is a good simple but thorough explanation here?

http://www.semiconductors.philips.com/acrobat/applicationnotes/AN177.pdf

 

[bubaloo]

and so the frequency

Hold on here: increasing reverse bias lowers capacitance, and results in a
HIGHER output frequency.
--
Remove the "jam" if by email.


ralph sansbury <sansbury@bestweb.net> wrote in message
news:vm3po3h431cje0@corp.supernews.com...

I can see how an increased reverse bias voltage on a diode in
a PLL circuit reduces the capacitance C in an LC oscillator and
so the frequency and how an RC circuit can delay the start and
extend the finish of a square wave oscillation but the simple
explanations I have seen of the PLL circuit refer only to the
change in capacitance of the LC oscillator and so to the change
in frequency and that this somehow could produce just a change in
phase.
What is a good simple but thorough explanation here?

 

[Roy McCammon]

ralph sansbury wrote:

I can see how an increased reverse bias voltage on a diode in
a PLL circuit reduces the capacitance C in an LC oscillator and
so the frequency and how an RC circuit can delay the start and
extend the finish of a square wave oscillation but the simple
explanations I have seen of the PLL circuit refer only to the
change in capacitance of the LC oscillator and so to the change
in frequency and that this somehow could produce just a change in
phase.
What is a good simple but thorough explanation here?

phase is the integral of frequency

frequency is the derivative of phase