R
raghu
Guest
Is the following verilog code correct?
module check(data,sel);
output [5:0] data;
input [1:0]sel;
data = { data[3:5], box(data[3:5] , com(sel) ) ^ data[0:2] };
function [2:0] com; // com function definition
input [1:0] sel;
begin
statements;
end
endfunction
here com() function returns 3 bit value..
can anyone please tell me how to define the function box()...assuming
box function returns a 3-bit value..
I tried as...
function [2:0] box;
input [3:5] data;
input com(sel); /// ..is it correct?
begin
statements;
end
endfunction
Hoping for a positive response...
Thanks a lot..
Regards,
Raghu
module check(data,sel);
output [5:0] data;
input [1:0]sel;
data = { data[3:5], box(data[3:5] , com(sel) ) ^ data[0:2] };
function [2:0] com; // com function definition
input [1:0] sel;
begin
statements;
end
endfunction
here com() function returns 3 bit value..
can anyone please tell me how to define the function box()...assuming
box function returns a 3-bit value..
I tried as...
function [2:0] box;
input [3:5] data;
input com(sel); /// ..is it correct?
begin
statements;
end
endfunction
Hoping for a positive response...
Thanks a lot..
Regards,
Raghu