W
walala
Guest
Dear all,
It turns out the VHDL code and the synthesis tool will largely affect the
resource usage of the synthesized design: from power, throughput to area...
are there any books talking about VHDL programming, (and/or) synthesis(e.g.,
via Synopsys DC) and the trade-off among throughput, area, and power? Please
recommend good books!
Thanks a lot,
-Walala
It turns out the VHDL code and the synthesis tool will largely affect the
resource usage of the synthesized design: from power, throughput to area...
are there any books talking about VHDL programming, (and/or) synthesis(e.g.,
via Synopsys DC) and the trade-off among throughput, area, and power? Please
recommend good books!
Thanks a lot,
-Walala