P
Pascal Peyremorte
Guest
seice.kao@gmail.com a ĂŠcrit :
The better help that I can tell :
--> Do it yourself
Pascal
The better help that I can tell :
--> Do it yourself
Pascal
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P
Paul Floyd
Guest
On Wed, 07 Nov 2007 07:29:37 -0800, Mike Treseler
<mike_treseler@comcast.net> wrote:
page.
A bientot
Paul
--
Paul Floyd http://paulf.free.fr
<mike_treseler@comcast.net> wrote:
Assuming that it wasn't copied/pasted from the professor's intranet webseice.kao@gmail.com wrote:
A magnitude comparator(which compares two unsigned binary words,A
and B, and result in two outputs, A>B A<B ) is required
If you can't work any of those problems
in less time than doing all that typing,
you are in the wrong class.
From the questions, it doesn't sound like
a very good class anyway.
Drop it before you see worse on the mid-term exam.
Nice typing, by the way.
page.
A bientot
Paul
--
Paul Floyd http://paulf.free.fr
M
Mike Treseler
Guest
seice.kao@gmail.com wrote:
in less time than doing all that typing,
you are in the wrong class.
From the questions, it doesn't sound like
a very good class anyway.
Drop it before you see worse on the mid-term exam.
Nice typing, by the way.
-- Mike Treseler
If you can't work any of those problemsA magnitude comparator(which compares two unsigned binary words,A
and B, and result in two outputs, A>B A<B ) is required
in less time than doing all that typing,
you are in the wrong class.
From the questions, it doesn't sound like
a very good class anyway.
Drop it before you see worse on the mid-term exam.
Nice typing, by the way.
-- Mike Treseler
Guest
A magnitude comparator(which compares two unsigned binary words,A
and B, and result in two outputs, A>B A<B ) is required
1.(a)Design at the gate level a single bit slice for this comparator
with the
comparison signals flowing from LSB to MSB
(b)Design at the gate level a single bit slice for this comparator
with the
comparison signals flowing from MSB to LSB
(c)How could these comparators be used if A and B were signed
two's-complement binary numbers?(Note No internal modification of the
comparator is required)
2.(a)Write a structural VHDL description of your design question 1.(a)
and iterate this using GENERATE statements to form 8-bit comparator
(b)Provide a RTL-LEVEL VHDL description of a magnitude comparator
(which compares two 8-bit std_logic_vectors representing unsigned
binary words A and B and results in two std_logic outputs A_gt_B and
A_lt_B)
(c)How would you modify the VHDL code of Question 2(b)if A and B
were representing two's complement signed numbers
(d) If possible synthesize the VHDL code produved for question 2(a)
and
2(b) using a CMOS process as the target technology. Compare the
synthesized circuits and discuss the results.( If you do not have
access to
a synthesiser discuss what you night expect from the synthesis of
these
two descriptions).
3.Design a schematic diagram illustrating how an 8-bit subtractor
(delivering an 8-bit result) can be implemented using carry lookahead
techniques
and B, and result in two outputs, A>B A<B ) is required
1.(a)Design at the gate level a single bit slice for this comparator
with the
comparison signals flowing from LSB to MSB
(b)Design at the gate level a single bit slice for this comparator
with the
comparison signals flowing from MSB to LSB
(c)How could these comparators be used if A and B were signed
two's-complement binary numbers?(Note No internal modification of the
comparator is required)
2.(a)Write a structural VHDL description of your design question 1.(a)
and iterate this using GENERATE statements to form 8-bit comparator
(b)Provide a RTL-LEVEL VHDL description of a magnitude comparator
(which compares two 8-bit std_logic_vectors representing unsigned
binary words A and B and results in two std_logic outputs A_gt_B and
A_lt_B)
(c)How would you modify the VHDL code of Question 2(b)if A and B
were representing two's complement signed numbers
(d) If possible synthesize the VHDL code produved for question 2(a)
and
2(b) using a CMOS process as the target technology. Compare the
synthesized circuits and discuss the results.( If you do not have
access to
a synthesiser discuss what you night expect from the synthesis of
these
two descriptions).
3.Design a schematic diagram illustrating how an 8-bit subtractor
(delivering an 8-bit result) can be implemented using carry lookahead
techniques