plb_ddr_1.00.c cas latency ?

[stephane]

Hello, <br><br>I have a CL = 2.5 DDR module that I drive with the plb_ddr_1.00.c. <br><br>To get the CL = 2.5, I have to program the mode register of the ddr with 6. <br><br>The problem is that the plb_ddr_1.00.c doesn't make the translation and make a CL = 6 ! <br><br>How can I specify a CL = 2.5 to the plb_ddr_1.00.c controller ? <br><br>Thank you. <br><br>Stephane.