picoblaze help

hello all,
I am new in the field of soft core processor.
I want to implement multiple picoblaze on spartan 3E.

I had gone through doc available on xilinx website.
All demo available on web is working fine with me.
I am trying to interface a seven segment with picoblaze but somehow i am not able to make my own design.

Please guide me for same.

 

[Tim Wescott]

On Tue, 18 Sep 2012 07:43:13 -0700, rvm.rahul wrote:

hello all,
I am new in the field of soft core processor. I want to implement
multiple picoblaze on spartan 3E.

I had gone through doc available on xilinx website. All demo available
on web is working fine with me. I am trying to interface a seven segment
with picoblaze but somehow i am not able to make my own design.

Please guide me for same.

I can't help you much because I haven't done this, but I can tell you a
bit:

First, you haven't told us everything. Most importantly, how far did you
get? Have you gotten a picoblaze working on a test board? How did you
determine that it works?

Second: how are you trying to interface the seven-segment display to the
Picoblaze?

The obvious way to me (keeping in mind that I haven't played with a
Picoblaze so I'm thinking like a board designer) would be to map a
section of the Picoblaze's memory space to an 8-bit register that
captures a byte on a write to a specific address, then connect that
register to eight output pins on the FPGA. Those output pins can then go
to your seven segments (plus decimal point!), and you can write any
arbitrary combination of "on" and "off" that you want.

I'd try to find a demo that shows how to get a Picoblaze working and
"talking" to output pins on the FPGA and work from there. If you're
lucky there's a demo that shows how to get an 8-bit parallel output port
to the outside world, in which case your FPGA firmware task is _done_ and
all you need to do is write software.

--
My liberal friends think I'm a conservative kook.
My conservative friends think I'm a liberal kook.
Why am I not happy that they have found common ground?

Tim Wescott, Communications, Control, Circuits & Software
http://www.wescottdesign.com

 

Am Dienstag, 18. September 2012 16:43:14 UTC+2 schrieb rvm....@gmail.com:

hello all,

I am new in the field of soft core processor.

I want to implement multiple picoblaze on spartan 3E.



I had gone through doc available on xilinx website.

All demo available on web is working fine with me.

I am trying to interface a seven segment with picoblaze but somehow i am not able to make my own design.



Please guide me for same.

Hi,
do you have some knowledge/experience with HDLs or digital design?

The PicoBlaze documentation shows very well how to add ports to the core and how to access these ports from the software. (Sorry Tim, there's no memory mapped I/O for the picoblaze. But the real solution is quite similar.)

Many beginners questions regarding the Picoblaze have already been answered and can be found here:
http://forums.xilinx.com/t5/PicoBlaze/bd-p/PicoBlaze

If there are still things unclear you should explain them in more detail.
- What board are you using?
- What is your design method (schematic, verilog, VHDL)?
- Where exactly are you haveing problems with your design?
(Error messages etc.)

The above mentioned subforum might be a better place for this, since it is specialized on Picoblaze related topics.

Have a nice synthesis
Eilert

 

[Travis Ayres]

You could get memory mapped I/O if you customized the program instruction code in VHDL manually by making certain addresses output values from registers that were connected to I/O directly.

The picoblaze assembler wouldn't be aware of this modification, of course, so you'd introduce a whole new way of shooting yourself in the foot, but it could be done right?

Any thoughts?

On Tuesday, September 18, 2012 11:46:01 PM UTC-7, goou...@gmail.com wrote:

Am Dienstag, 18. September 2012 16:43:14 UTC+2 schrieb rvm....@gmail.com:

hello all,



I am new in the field of soft core processor.



I want to implement multiple picoblaze on spartan 3E.







I had gone through doc available on xilinx website.



All demo available on web is working fine with me.



I am trying to interface a seven segment with picoblaze but somehow i am not able to make my own design.







Please guide me for same.



Hi,

do you have some knowledge/experience with HDLs or digital design?



The PicoBlaze documentation shows very well how to add ports to the core and how to access these ports from the software. (Sorry Tim, there's no memory mapped I/O for the picoblaze. But the real solution is quite similar.)



Many beginners questions regarding the Picoblaze have already been answered and can be found here:

http://forums.xilinx.com/t5/PicoBlaze/bd-p/PicoBlaze



If there are still things unclear you should explain them in more detail.

- What board are you using?

- What is your design method (schematic, verilog, VHDL)?

- Where exactly are you haveing problems with your design?

(Error messages etc.)



The above mentioned subforum might be a better place for this, since it is specialized on Picoblaze related topics.



Have a nice synthesis

Eilert

 

[Gabor]

On 12/31/2012 4:26 AM, Travis Ayres wrote:

You could get memory mapped I/O if you customized the program instruction code in VHDL manually by making certain addresses output values from registers that were connected to I/O directly.

The picoblaze assembler wouldn't be aware of this modification, of course, so you'd introduce a whole new way of shooting yourself in the foot, but it could be done right?

Any thoughts?

The PicoBlaze doesn't really have a data "memory" address other than
the INPUT and OUTPUT instructions. You could bring a register directly
to a port (I've done this for IO expansion) or perhaps on pB versions
that have a scratchpad bring that bus out to a port (mine, KCPSM2
predated the scratchpad, but had more registers).

Instruction memory is a different beast, and of course you can't write
to it unless you modify the core (probably best not to allow this).

-- Gabor