Phase locked loop question

[Daku]

Could some electronics guru please help me ? Suppose I have phase
locked loop in "locked in" state. Now suppose that I wish to use the
reference signal for some further processing ? To be more precise,
what signal has to be monitored on the phase locked loop, so that I
know that the "locked in" state has been achieved, keeping in mind
that the loop filter, generates an average value of the input signal,
on successful loc in. Nay hints, suggestions would be of immense value
- thanks in advance for your help.

 

[Michael Black]

On Sun, 18 Apr 2010, Daku wrote:

Could some electronics guru please help me ? Suppose I have phase
locked loop in "locked in" state. Now suppose that I wish to use the
reference signal for some further processing ? To be more precise,
what signal has to be monitored on the phase locked loop, so that I
know that the "locked in" state has been achieved, keeping in mind
that the loop filter, generates an average value of the input signal,
on successful loc in. Nay hints, suggestions would be of immense value
- thanks in advance for your help.

It depends on the phase detector. What it is will define how to go

about adding a lock detector.

If it's an IC specifically for the task, the manufacturer's datasheet or
application note is likely going to show a lock detector.

Michael

 

[Tim Wescott]

Michael Black wrote:

On Sun, 18 Apr 2010, Daku wrote:

Could some electronics guru please help me ? Suppose I have phase
locked loop in "locked in" state. Now suppose that I wish to use the
reference signal for some further processing ? To be more precise,
what signal has to be monitored on the phase locked loop, so that I
know that the "locked in" state has been achieved, keeping in mind
that the loop filter, generates an average value of the input signal,
on successful loc in. Nay hints, suggestions would be of immense value
- thanks in advance for your help.

It depends on the phase detector. What it is will define how to go
about adding a lock detector.

If it's an IC specifically for the task, the manufacturer's datasheet or
application note is likely going to show a lock detector.

It depends on more than just the phase detector! Lock detectors
generally work -- one way or another -- by monitoring the error signal
and deciding when it is quiet enough to declare lock.

If the input signal is noisy, either with additive noise or with timing
jitter, the noise signal can confound a lock detector to never declaring
lock -- conversely, if you try to design the lock detector to work in
the presence of the noise, you open the door wider to falsely detecting
lock.

If the input signal is nice and quiet, then the lock detector becomes
easy -- see any 4046 PLL data sheet for a nice digital implementation.

--
Tim Wescott
Control system and signal processing consulting
www.wescottdesign.com

 

[krw@att.bizzzzzzzzzzzz]

On Sun, 18 Apr 2010 12:36:59 -0700, Tim Wescott <tim@seemywebsite.now> wrote:

Michael Black wrote:
On Sun, 18 Apr 2010, Daku wrote:

Could some electronics guru please help me ? Suppose I have phase
locked loop in "locked in" state. Now suppose that I wish to use the
reference signal for some further processing ? To be more precise,
what signal has to be monitored on the phase locked loop, so that I
know that the "locked in" state has been achieved, keeping in mind
that the loop filter, generates an average value of the input signal,
on successful loc in. Nay hints, suggestions would be of immense value
- thanks in advance for your help.

It depends on the phase detector. What it is will define how to go
about adding a lock detector.

If it's an IC specifically for the task, the manufacturer's datasheet or
application note is likely going to show a lock detector.

It depends on more than just the phase detector! Lock detectors
generally work -- one way or another -- by monitoring the error signal
and deciding when it is quiet enough to declare lock.

If the input signal is noisy, either with additive noise or with timing
jitter, the noise signal can confound a lock detector to never declaring
lock

In this case, it could be argued that lock has never been established.

-- conversely, if you try to design the lock detector to work in
the presence of the noise, you open the door wider to falsely detecting
lock.

Maybe it is. It could be argued that the lock detector defines "lock". ;-)

If the input signal is nice and quiet, then the lock detector becomes
easy -- see any 4046 PLL data sheet for a nice digital implementation.

Yes, the lock detection circuits does depend on the phase comparator, as Mr.
Black said above.

 

[Tim Wescott]

krw@att.bizzzzzzzzzzzz wrote:

On Sun, 18 Apr 2010 12:36:59 -0700, Tim Wescott <tim@seemywebsite.now> wrote:

Michael Black wrote:
On Sun, 18 Apr 2010, Daku wrote:

Could some electronics guru please help me ? Suppose I have phase
locked loop in "locked in" state. Now suppose that I wish to use the
reference signal for some further processing ? To be more precise,
what signal has to be monitored on the phase locked loop, so that I
know that the "locked in" state has been achieved, keeping in mind
that the loop filter, generates an average value of the input signal,
on successful loc in. Nay hints, suggestions would be of immense value
- thanks in advance for your help.

It depends on the phase detector. What it is will define how to go
about adding a lock detector.

If it's an IC specifically for the task, the manufacturer's datasheet or
application note is likely going to show a lock detector.
It depends on more than just the phase detector! Lock detectors
generally work -- one way or another -- by monitoring the error signal
and deciding when it is quiet enough to declare lock.

If the input signal is noisy, either with additive noise or with timing
jitter, the noise signal can confound a lock detector to never declaring
lock

In this case, it could be argued that lock has never been established.

-- conversely, if you try to design the lock detector to work in
the presence of the noise, you open the door wider to falsely detecting
lock.

Maybe it is. It could be argued that the lock detector defines "lock". ;-)

Could be, but then it could be that you'd just be playing semantic games.

Saying "A is A when my 'A measuring tool' says it is" is a test of your
customer's credulity, not your tool. It means that the lock detector is
never wrong, even when, looking at the reference signal, the PLL output,
and the lock detector output gives you an obviously ridiculous relation.

If you define "lock" as "the phase and frequency of your PLL are
currently bang on the mark" then suddenly you can have an independent
test that you can use to check the veracity of your lock detector -- and
everything I said above is valid.

--
Tim Wescott
Control system and signal processing consulting
www.wescottdesign.com

 

[krw@att.bizzzzzzzzzzzz]

On Sun, 18 Apr 2010 15:50:37 -0700, Tim Wescott <tim@seemywebsite.now> wrote:

krw@att.bizzzzzzzzzzzz wrote:
On Sun, 18 Apr 2010 12:36:59 -0700, Tim Wescott <tim@seemywebsite.now> wrote:

Michael Black wrote:
On Sun, 18 Apr 2010, Daku wrote:

Could some electronics guru please help me ? Suppose I have phase
locked loop in "locked in" state. Now suppose that I wish to use the
reference signal for some further processing ? To be more precise,
what signal has to be monitored on the phase locked loop, so that I
know that the "locked in" state has been achieved, keeping in mind
that the loop filter, generates an average value of the input signal,
on successful loc in. Nay hints, suggestions would be of immense value
- thanks in advance for your help.

It depends on the phase detector. What it is will define how to go
about adding a lock detector.

If it's an IC specifically for the task, the manufacturer's datasheet or
application note is likely going to show a lock detector.
It depends on more than just the phase detector! Lock detectors
generally work -- one way or another -- by monitoring the error signal
and deciding when it is quiet enough to declare lock.

If the input signal is noisy, either with additive noise or with timing
jitter, the noise signal can confound a lock detector to never declaring
lock

In this case, it could be argued that lock has never been established.

-- conversely, if you try to design the lock detector to work in
the presence of the noise, you open the door wider to falsely detecting
lock.

Maybe it is. It could be argued that the lock detector defines "lock". ;-)

Could be, but then it could be that you'd just be playing semantic games.

It has to be one or the other.

Saying "A is A when my 'A measuring tool' says it is" is a test of your
customer's credulity, not your tool. It means that the lock detector is
never wrong, even when, looking at the reference signal, the PLL output,
and the lock detector output gives you an obviously ridiculous relation.

If you define "lock" as "the phase and frequency of your PLL are
currently bang on the mark" then suddenly you can have an independent
test that you can use to check the veracity of your lock detector -- and
everything I said above is valid.

No, you have an specification that is impossible to meet.

 

[John Larkin]

On Sun, 18 Apr 2010 12:36:59 -0700, Tim Wescott <tim@seemywebsite.now>
wrote:

Michael Black wrote:
On Sun, 18 Apr 2010, Daku wrote:

Could some electronics guru please help me ? Suppose I have phase
locked loop in "locked in" state. Now suppose that I wish to use the
reference signal for some further processing ? To be more precise,
what signal has to be monitored on the phase locked loop, so that I
know that the "locked in" state has been achieved, keeping in mind
that the loop filter, generates an average value of the input signal,
on successful loc in. Nay hints, suggestions would be of immense value
- thanks in advance for your help.

It depends on the phase detector. What it is will define how to go
about adding a lock detector.

If it's an IC specifically for the task, the manufacturer's datasheet or
application note is likely going to show a lock detector.

It depends on more than just the phase detector! Lock detectors
generally work -- one way or another -- by monitoring the error signal
and deciding when it is quiet enough to declare lock.

A more reliable way is to use a second phase detector but shift its LO
input 90 degrees, usually digitally. So when the main detector output
nulls, the output of the second PD peaks. That state is observable.

Another way: if the loop includes an integrator, the integrator may
rail when the loop is unlocked; that's easy to detect.

John