pci

[robert]

i am doing project in pci master controller using vhdl i need the
details of pci master controller

 

[Kai Harrekilde-Petersen]

"robert" <roberttheivadas@gmail.com> writes:

i am doing project in pci master controller using vhdl i need the
details of pci master controller

Get and read the PCI spec. That's what I'd do.


Kai
--
Kai Harrekilde-Petersen <khp(at)harrekilde(dot)dk>

 

[krby_xtrm]

hello kai,
have you made a pci core?

 

[Kai Harrekilde-Petersen]

"krby_xtrm" <kerby.martino@gmail.com> writes:

hello kai,
have you made a pci core?

Yup. I recommend you to read (and understand!) the pci standard.

Cheers,


Kai
--
Kai Harrekilde-Petersen <khp(at)harrekilde(dot)dk>

 

[krby_xtrm]

Yes, i have read it already but not yet done.
Parts of the core are

CONFIG REGs,
---
ADDRESS/DATA BUFFER,
--
PCI_TARGET_CONTROL
--
PARITY GENERATOR & CHECKER
--
LOCAL ADDRESS/DATA/COMMAND/BYTE ENABLES (others system dont have this,
why?)
--
LOCAL TARGET INTERFACE CONTROL,
--


What i have made is the PCI Target Control, its the state machine;
responsible on latching address (as far as i have coded);

What i am thinking is that there are target output BAR_HITS usually
6-bit output.
Bar_hits are used to tell the local side(back_end) that address matches
right?
But how does that target should do that?