PCI LogiCORE with ISE 5.2

[Dean Armstrong]

Hi All, <p>I am trying to synthesise the Xilinx example "ping" PCI LogiCORE using Synplify Pro 7.0 and Xilinx ISE 5.2. <p>I operate Synplify as detailed in the LogiCORE PCI Implementation Guide, and then start the ISE Project Navigator to implement the design. ISE fails at the translate stage with the output shown at the bottom of this post. <p>I am unclear as to where the error is in this process. The second launcher message about PCI_LC_I.ngo seems a bit suspect, but does not seem to be an error. <p>I would appreciate any help that anyone could give me on getting past this. I'm more than a little bit puzzled after playing with all the options I can find to no avail. <p>Regards, <BR>
Dean Armstrong. <p>Started process "Translate". <p>Command Line: ngdbuild -quiet -dd <BR>
e:\working\wireless\vhdl\pci\ping\synthesis/_ngo -uc <BR>
E:/working/wireless/vhdl/pci/xc2s100fg456_32_33.ucf -sd <BR>
E:\working\wireless\vhdl\pci\vhdl\src\xpci -p xc2s100-fg456-6 pcim_top.edf <BR>
pcim_top.ngd <p>Launcher: "pcim_top.ngo" is up to date. <BR>
Reading NGO file "e:/working/wireless/vhdl/pci/ping/synthesis/_ngo/pcim_top.ngo" <BR>
.... <BR>
Reading component libraries for design expansion... <BR>
Launcher: The source netlist for "PCI_LC_I.ngo" was not found; the current NGO <BR>
file will be used and no new NGO description will be compiled. This probably <BR>
means that the source netlist was moved or deleted. <p>abnormal program termination <BR>
ERROR: NGDBUILD failed <BR>
Reason: <p>Completed process "Translate".

 

[Mark van de Belt]

The launcher message is normal for the PCI core There is no source code for this core, so the ngdbuild will take the netlist instead of compiling the source code. This is correct.
It seems a bit strange that the slashes in your command line are not the same.
I can not find any reason for the abnormal program termination...

Mark
"Dean Armstrong" &lt;daa1@NOSPAMcs.waikato.ac.nz&gt; schreef in bericht news:ee81539.-1@WebX.sUN8CHnE...
Hi All,
I am trying to synthesise the Xilinx example "ping" PCI LogiCORE using Synplify Pro 7.0 and Xilinx ISE 5.2.

I operate Synplify as detailed in the LogiCORE PCI Implementation Guide, and then start the ISE Project Navigator to implement the design. ISE fails at the translate stage with the output shown at the bottom of this post.

I am unclear as to where the error is in this process. The second launcher message about PCI_LC_I.ngo seems a bit suspect, but does not seem to be an error.

I would appreciate any help that anyone could give me on getting past this. I'm more than a little bit puzzled after playing with all the options I can find to no avail.

Regards,
Dean Armstrong.

Started process "Translate".

Command Line: ngdbuild -quiet -dd
e:\working\wireless\vhdl\pci\ping\synthesis/_ngo -uc
E:/working/wireless/vhdl/pci/xc2s100fg456_32_33.ucf -sd
E:\working\wireless\vhdl\pci\vhdl\src\xpci -p xc2s100-fg456-6 pcim_top.edf
pcim_top.ngd

Launcher: "pcim_top.ngo" is up to date.
Reading NGO file "e:/working/wireless/vhdl/pci/ping/synthesis/_ngo/pcim_top.ngo"
...
Reading component libraries for design expansion...
Launcher: The source netlist for "PCI_LC_I.ngo" was not found; the current NGO
file will be used and no new NGO description will be compiled. This probably
means that the source netlist was moved or deleted.

abnormal program termination
ERROR: NGDBUILD failed
Reason:

Completed process "Translate".

 

[Eric Crabill]

Hello,

As someone had previously posted, the warning messages that
are issued by NGDBUILD when the core netlist is merged with
your user-design are expected and normal.

Any kind of "abnormal program termination" is never expected,
and never normal. Quite simply, you should never receive a
coredump or other abnormal program termination. Period.

However, complex software systems are rarely ever perfect, so
sometimes this kind of stuff happens. I urge you to file a
case with the Xilinx support hotline to resolve the issue.

Thanks,
Eric Crabill

Dean Armstrong wrote:

Hi All,

I am trying to synthesise the Xilinx example "ping" PCI LogiCORE using
Synplify Pro 7.0 and Xilinx ISE 5.2.

I operate Synplify as detailed in the LogiCORE PCI Implementation
Guide, and then start the ISE Project Navigator to implement the
design. ISE fails at the translate stage with the output shown at the
bottom of this post.

I am unclear as to where the error is in this process. The second
launcher message about PCI_LC_I.ngo seems a bit suspect, but does not
seem to be an error.

I would appreciate any help that anyone could give me on getting past
this. I'm more than a little bit puzzled after playing with all the
options I can find to no avail.

Regards,
Dean Armstrong.

Started process "Translate".

Command Line: ngdbuild -quiet -dd
e:\working\wireless\vhdl\pci\ping\synthesis/_ngo -uc
E:/working/wireless/vhdl/pci/xc2s100fg456_32_33.ucf -sd
E:\working\wireless\vhdl\pci\vhdl\src\xpci -p xc2s100-fg456-6
pcim_top.edf
pcim_top.ngd

Launcher: "pcim_top.ngo" is up to date.
Reading NGO file
"e:/working/wireless/vhdl/pci/ping/synthesis/_ngo/pcim_top.ngo"
...
Reading component libraries for design expansion...
Launcher: The source netlist for "PCI_LC_I.ngo" was not found; the
current NGO
file will be used and no new NGO description will be compiled. This
probably
means that the source netlist was moved or deleted.

abnormal program termination
ERROR: NGDBUILD failed
Reason:

Completed process "Translate".