PCB Layout: help needed

[Rich Wilner]

hi all--
I am laying out a complicated PCB, and I'm a newbie in this area so
i'd like some advice on how to approach it.
the circuit is basically a bunch of serial in parallel out shift
registers feeding some CMOS programmable switches, which select gain
for a bunch of op-amp voltage amplifiers.
Anyway, I have analog and digital signals. on the breadboard, i got
my +5v via a 5v linear regulator from the 15v rail feeding the opamps
(they're running of +/- 15v supply). Thus, I would love to have 5
planes: +15, -15, +5, agnd, and dgnd. this is of course not feasible.
a 4-layer board is more feasible. It is not possible to split the
planes.
so my questions are the following:

1) I have been told that tying the agnd and dgnd planes together is a
bad idea. is this true? I will have digital signals and analog
signals passing simultaneously (digital in the form of PWM, decoupled
with optos)

2) in keeping with that, if I can't tie my agnd and dgnd together, i
can't use a linear regulator to get my +5v, can I? If I can, how?

3) what should the two intrnal planes be? +5v and dgnd? dgnd and
agnd (if I can figure out a way to get 5v while isolating the two
grounds)?
thanks everyone, and please reply if anyone needs more clarification.
Rich

 

[Joerg]

Hi Rich,

My experience is the opposite. I (and thus my clients) have always fared
best with one solid ground plane for everything. It has actually saved the
bacon a lot of times when EMI and noise had been almost out of control and
after redesigning for a common ground there was a wonderful silence.

There are very few exceptions where I'd consider anything else, such as
high voltage applications or very low frequency gear.

Regards, Joerg
http://www.analogconsultants.com

 

[Frank Bemelman]

"Rich Wilner" <richardwilner@hotmail.com> schreef in bericht
news:e5e18e0f.0404261159.caab2e4@posting.google.com...

hi all--
I am laying out a complicated PCB, and I'm a newbie in this area so
i'd like some advice on how to approach it.
the circuit is basically a bunch of serial in parallel out shift
registers feeding some CMOS programmable switches, which select gain
for a bunch of op-amp voltage amplifiers.
Anyway, I have analog and digital signals. on the breadboard, i got
my +5v via a 5v linear regulator from the 15v rail feeding the opamps
(they're running of +/- 15v supply). Thus, I would love to have 5
planes: +15, -15, +5, agnd, and dgnd. this is of course not feasible.
a 4-layer board is more feasible. It is not possible to split the
planes.
so my questions are the following:

1) I have been told that tying the agnd and dgnd planes together is a
bad idea. is this true? I will have digital signals and analog
signals passing simultaneously (digital in the form of PWM, decoupled
with optos)

2) in keeping with that, if I can't tie my agnd and dgnd together, i
can't use a linear regulator to get my +5v, can I? If I can, how?

3) what should the two intrnal planes be? +5v and dgnd? dgnd and
agnd (if I can figure out a way to get 5v while isolating the two
grounds)?
thanks everyone, and please reply if anyone needs more clarification.
Rich

A lot of it depends how much crosstalk you allow yourself. It seems
that you are a bit too worried. Keep the digital stuff on one side
of the board, and the analog switches & op amps on the other side.
Split the +15 en -15, each 'branch' having a simple filter, one for
the opamps, and the other to a +5 regulator for your digital stuff.
Perhaps add some ferrites on the control lines to the analog
switches. Double sided PCB, nice fat tracks for GND on the bottom
side, thinner signal lines on top, and finally a copper fill for GND
once all tracks are layed out.

--
Thanks, Frank.
(remove 'x' and 'invalid' when replying by email)

 

[John Larkin]

On Mon, 26 Apr 2004 20:13:56 GMT, Joerg
<notthisjoergsch@removethispacbell.net> wrote:

Hi Rich,

My experience is the opposite. I (and thus my clients) have always fared
best with one solid ground plane for everything. It has actually saved the
bacon a lot of times when EMI and noise had been almost out of control and
after redesigning for a common ground there was a wonderful silence.

There are very few exceptions where I'd consider anything else, such as
high voltage applications or very low frequency gear.

Regards, Joerg
http://www.analogconsultants.com

Second that. Multiple ground planes seldom make sense. If you expect
noise, manage it locally.

John

 

[Tam/WB2TT]

"Rich Wilner" <richardwilner@hotmail.com> wrote in message
news:e5e18e0f.0404261159.caab2e4@posting.google.com...

hi all--
I am laying out a complicated PCB, and I'm a newbie in this area so
i'd like some advice on how to approach it.
the circuit is basically a bunch of serial in parallel out shift
registers feeding some CMOS programmable switches, which select gain
for a bunch of op-amp voltage amplifiers.
Anyway, I have analog and digital signals. on the breadboard, i got
my +5v via a 5v linear regulator from the 15v rail feeding the opamps
(they're running of +/- 15v supply). Thus, I would love to have 5
planes: +15, -15, +5, agnd, and dgnd. this is of course not feasible.
a 4-layer board is more feasible. It is not possible to split the
planes.
so my questions are the following:

1) I have been told that tying the agnd and dgnd planes together is a
bad idea. is this true? I will have digital signals and analog
signals passing simultaneously (digital in the form of PWM, decoupled
with optos)

2) in keeping with that, if I can't tie my agnd and dgnd together, i
can't use a linear regulator to get my +5v, can I? If I can, how?

3) what should the two intrnal planes be? +5v and dgnd? dgnd and
agnd (if I can figure out a way to get 5v while isolating the two
grounds)?
thanks everyone, and please reply if anyone needs more clarification.
Rich

Rich,

What we did was to use the same PCB layer (but separated) for the digital
and analog grounds. We tied them together at one point, where the signal
passed from the analog to the digital. Same for the VCC layer, but the
connection was through an RF choke. Since the digital stuff was running at
60 MHz and close to the second IF frequency, the Rf choke was 5 uH. This was
for a chipset reference design. So, I don't know if the customers actually
did all this.

Somebody had suggested we use linear regulators to clean up the RF VCC. This
did nothing. They provide no reduction of input noise above a few hundred
KHz other than that provided by the input and output bypass caps.

Tam

 

[Rich Wilner]

Joerg <notthisjoergsch@removethispacbell.net> wrote in message news:<408D6E90.B58B6FD2@removethispacbell.net>...

Hi Rich,

My experience is the opposite. I (and thus my clients) have always fared
best with one solid ground plane for everything. It has actually saved the
bacon a lot of times when EMI and noise had been almost out of control and
after redesigning for a common ground there was a wonderful silence.

There are very few exceptions where I'd consider anything else, such as
high voltage applications or very low frequency gear.

Regards, Joerg
http://www.analogconsultants.com

thanks for your help everyone. This makes me extremely happy, since
it simplifies the layout considerably.
I got the notion to split/separate the ground plane from some notes at
analogZONE, but it wasn't clear whether or not it was suggested,
optional, or just an alternate approach.
however, your last comment gives me pause. The opamps are performing
some filtering and gain for a data acquision system that's monitoring
the performance of an IGBT, controlling a 3 phase motor. Basically
that means i'm looking to measure 60-240Hz, which is VLF. The PWM,
which is also going through this board, will be somewhere in the range
of 50kHz-100kHz for controlling the IGBT.
should I still be ok with one gnd plane here?
Also...the aforementioned article talked about bypassing the power
supply at the pins of each active device with .1uF caps, and at the
supply source with a 10uf cap (i assume lytics). I interpret "Bypass"
to mean go from power to ground; otherwise i'd be blocking the DC
supply (which i guess could be construed as bypassing it!). Is this
good practice in your collective experience?
thanks again!!
Rich

 

[John Larkin]

On 26 Apr 2004 20:11:27 -0700, richardwilner@hotmail.com (Rich Wilner)
wrote:

Joerg <notthisjoergsch@removethispacbell.net> wrote in message news:<408D6E90.B58B6FD2@removethispacbell.net>...
Hi Rich,

My experience is the opposite. I (and thus my clients) have always fared
best with one solid ground plane for everything. It has actually saved the
bacon a lot of times when EMI and noise had been almost out of control and
after redesigning for a common ground there was a wonderful silence.

There are very few exceptions where I'd consider anything else, such as
high voltage applications or very low frequency gear.

Regards, Joerg
http://www.analogconsultants.com

thanks for your help everyone. This makes me extremely happy, since
it simplifies the layout considerably.
I got the notion to split/separate the ground plane from some notes at
analogZONE, but it wasn't clear whether or not it was suggested,
optional, or just an alternate approach.
however, your last comment gives me pause. The opamps are performing
some filtering and gain for a data acquision system that's monitoring
the performance of an IGBT, controlling a 3 phase motor. Basically
that means i'm looking to measure 60-240Hz, which is VLF. The PWM,
which is also going through this board, will be somewhere in the range
of 50kHz-100kHz for controlling the IGBT.
should I still be ok with one gnd plane here?
Also...the aforementioned article talked about bypassing the power
supply at the pins of each active device with .1uF caps, and at the
supply source with a 10uf cap (i assume lytics). I interpret "Bypass"
to mean go from power to ground; otherwise i'd be blocking the DC
supply (which i guess could be construed as bypassing it!). Is this
good practice in your collective experience?
thanks again!!
Rich

If you expect large power-level currents to flow through the ground
plane, think of the plane as a sheet resistor. If a bunch of current
flows between points A and B, distant points C and D can have a
smaller potential imposed between them, the amount depending on the
geometry and distance. Least coupling is when A and B are close, C and
D are close, and AB is far from CD. Think about classic equipotential
lines in a sheet conductor and stuff like that. If the board ground
plane is bolted to the case at multiple points (which is good for EMI)
there is additional possibility of poking potentials into the ground
plane. So, the ground plane is *not* necessarily equipotential. If all
your analog signals are measured in volts, it's no big deal.

I try to keep sensitive analog stuff very local (as in, all critical
ground nodes returning to a single handy via) and occasionally add
cuts to the ground plane to break up circulating current paths near a
sensitive sub-circuit. I just finished a 10-amp NMR gradient driver
with well over 130 dB hum rejection - nanovolts - with everything
(power supply included) on one small board. The critical shunt+preamp
is inside a "peninsula", a square isolated from the main ground on
three sides (imagine a U-shape etched out of the ground plane, with
the tender stuff inside.)

A bypass cap (Vxx to ground!) per chip power pin is OK, likely
overkill if you have a power plane with hefty pours. Keep power and
ground layers close (thin-as-possible dielectric between.)

John

 

[qrk]

On 26 Apr 2004 12:59:32 -0700, richardwilner@hotmail.com (Rich Wilner)
wrote:

hi all--
I am laying out a complicated PCB, and I'm a newbie in this area so
i'd like some advice on how to approach it.
the circuit is basically a bunch of serial in parallel out shift
registers feeding some CMOS programmable switches, which select gain
for a bunch of op-amp voltage amplifiers.
Anyway, I have analog and digital signals. on the breadboard, i got
my +5v via a 5v linear regulator from the 15v rail feeding the opamps
(they're running of +/- 15v supply). Thus, I would love to have 5
planes: +15, -15, +5, agnd, and dgnd. this is of course not feasible.
a 4-layer board is more feasible. It is not possible to split the
planes.
so my questions are the following:

1) I have been told that tying the agnd and dgnd planes together is a
bad idea. is this true? I will have digital signals and analog
signals passing simultaneously (digital in the form of PWM, decoupled
with optos)

2) in keeping with that, if I can't tie my agnd and dgnd together, i
can't use a linear regulator to get my +5v, can I? If I can, how?

3) what should the two intrnal planes be? +5v and dgnd? dgnd and
agnd (if I can figure out a way to get 5v while isolating the two
grounds)?
thanks everyone, and please reply if anyone needs more clarification.
Rich

You need to tie your digi and analog ground planes at some point. I'll
agree with others that a shared solid ground plane on one layer for
digi and analog works well. One thing I like doing is dividing the
ground plane where the digital junk stays in one area, and the analog
stuff is in its own area (analog gnd plane can be a atoll). You can
divide the ground plane with a couple/few 10 mil lines with a gap to
connect the analog and digital grounds. This technique is used in
switching power supply boards to separate the low-level control
circuitry from the high-current switching circuitry. Any PCB layout
program can do this, even ones back in the late 1980's.

divided pcb gnd plane
with gap between areas divided pcb pwr plane
+---------+------------+ +---------+------------+
| | | | | |
| digi | analog | | digi | analog + |
| | | | pwr | pwr |
| | | +------------+
| | | | |
| | | | | analog - |
| | | | | pwr |
+---------+------------+ +---------+------------+

You don't say what sort of logic your using and how complicated your
board is. However, it is usually a good idea to have a solid power
plane for the digital stuff. The power plane next to the ground plane
layer make a really nice bypass capacitor for high-speed logic. I show
the analog power plane as two rectangles. You can make this into a
comb if it suits you better.

If you need to run high-speed signals (> 5 ns edges) from digital to
analog, then you might want to consider no gap between the analog and
digital ground planes.

If your analog stuff is sensitive to power supply noise, it is a good
idea to use ferrite beads between the digital and analog power
supplies. Ferrite is a religion. Include it in your everyday life.
The ferrite will prevent fast edges from propagating into your analog
power supply. A linear regulator feeding the analog circuitry works
wonders getting rid of the lower frequency (below 100 kHz) digital
noise.

Mark

 

[Joerg]

Hello Rich,

If you have PWM current running along that probably means harmonics, spikes etc. That certainly calls for a common
ground plane.

Also, I don't really agree with the slit or interruption of that plane that some have suggested. In the past I had
closed almost all of those slits when called out for a noise consulting job. Lots of solder was poured. Afterwards
they all did a re-layout and the slit was removed, reducing noise considerably.

Regards, Joerg

http://www.analogconsultants.com

 

[Rich Wilner]

If your analog stuff is sensitive to power supply noise, it is a good
idea to use ferrite beads between the digital and analog power
supplies. Ferrite is a religion. Include it in your everyday life.
The ferrite will prevent fast edges from propagating into your analog
power supply. A linear regulator feeding the analog circuitry works
wonders getting rid of the lower frequency (below 100 kHz) digital
noise.

Mark

hi mark and everyone
thanks again for all your responses. I'm going to describe this board
a little bit more, and then ask more questions!!
- I have a good amount of voltage, but not much current going through
my board (20vac p-p, but on the order of 20ma/channel x 8 channels for
analog, and 0-5v, 10ma/channel x 16 channels for digial and pwm).
- the fastest switching frequency i'll deal with for digital is
100khz. even when i clock data into my shift registers to configure
the analog switches, I do so around 50kHz (I am generating the clock
on a pin of my parallel port through visual basic).
- I suspect my analog section is sensitive to power supply noise. I
don't know this for sure, but until i put some 100uf caps on the rails
of my breadboard i was getting some serious HF oscillation.
- the board is complicated, from a layout perspective. there are lots
of components, i have 128 bits of memory (16x8bit shift registers),
each feeding 8 analog switches and 16 muxes to configure signal
routing, in addition to some signal processing circuitry, transistors
to drive indicator leds, etc. And, everything is DIP and thru-hole
because i need to build this thing by hand.

questions:
1) I am clueless what you guys are talking about with ferrite beads,
etc (inductors?). Please enlighten me.
2) I am using ExpressSCH and ExpressPCB to lay this out, because the
software is free. it doesn't allow me to split ground or power
planes. Also, it allows linking of schematics and layouts via
netlists, but it doesn't create a layout automatically (which i would
tweak of course). what programs do you guys use/suggest (Eagle?)?
3) is it smart to get my 5v for digital from my +15v via a 5v linear
regulator (7805xx)? a dc-dc converter would give me more isolation
but give me more problems with switching noise, and be a pain in the
butt to build/replace if it blew. A separate 5v supply is an option,
but it would be cleaner to just use one supply. If I use a linear
regulator and i split the gnd plane, the linear regulator is where i'd
have to connect agnd and dgnd.

thanks again, everyone for being so helpful to me. It blows my mind
that nobody teaches this stuff in school!!
Rich

 

[Bill Sloman]

qrk <SpamTrap@reson.com> wrote in message news:<veor80h9cr56k4kvthcd2bo1i3bgc6sn0l@4ax.com>...

On 26 Apr 2004 12:59:32 -0700, richardwilner@hotmail.com (Rich Wilner)
wrote:

<snipped good stuff>

If your analog stuff is sensitive to power supply noise, it is a good
idea to use ferrite beads between the digital and analog power
supplies. Ferrite is a religion. Include it in your everyday life.
The ferrite will prevent fast edges from propagating into your analog
power supply. A linear regulator feeding the analog circuitry works
wonders getting rid of the lower frequency (below 100 kHz) digital
noise.

One word of warning about ferrite beads. Although the ferrite in the
bead is lossy, they look moderately high Q inductors with an
inductance of the order of 1uH at frequencies below a few MHz, and can
resonate with a 100nF decoupling capacitor to give quite a sharp
resonance at a few hundred kHz.

If your power rails are decoupled with an electrolytic capacitor as
well as a scattering of 100nF ceramic capacitors, the resonace moves
down to a few tens of kHz and the equivalent series resistance of the
electrolytic capacitor is enough to damp the resonance.

I ran into the problem wth a low-powered conductivity to frequency
transducer, where the scatter on the frequency versus conductivity
curve went up significantly at frequencies that gave harmonics close
to the resonance.

A tantalum electrolytic in parallel with the ceramic chip did solve
the problem, but increased the power consumption. I ended up putting a
small wound inductor (10uH) in series with the ferrite bead to get a
predictable inductance and put a 22R resistor in series with that to
damp the resonance. The wound industor looked like a capacitor at the
high frequencies - tens of MHz - that I was actually worried about, so
I still needed the ferrite bead..

------
Bill Sloman, Nijmegen

-------
Bill Sloman, Nijmegen

 

[Spehro Pefhany]

On 27 Apr 2004 07:05:13 -0700, the renowned bill.sloman@ieee.org (Bill
Sloman) wrote:

qrk <SpamTrap@reson.com> wrote in message news:<veor80h9cr56k4kvthcd2bo1i3bgc6sn0l@4ax.com>...
On 26 Apr 2004 12:59:32 -0700, richardwilner@hotmail.com (Rich Wilner)
wrote:

snipped good stuff

If your analog stuff is sensitive to power supply noise, it is a good
idea to use ferrite beads between the digital and analog power
supplies. Ferrite is a religion. Include it in your everyday life.
The ferrite will prevent fast edges from propagating into your analog
power supply. A linear regulator feeding the analog circuitry works
wonders getting rid of the lower frequency (below 100 kHz) digital
noise.

One word of warning about ferrite beads. Although the ferrite in the
bead is lossy, they look moderately high Q inductors with an
inductance of the order of 1uH at frequencies below a few MHz, and can
resonate with a 100nF decoupling capacitor to give quite a sharp
resonance at a few hundred kHz.

There is a huge range in impedance on the ferrite beads. Does your
statement apply in general?

If your power rails are decoupled with an electrolytic capacitor as
well as a scattering of 100nF ceramic capacitors, the resonace moves
down to a few tens of kHz and the equivalent series resistance of the
electrolytic capacitor is enough to damp the resonance.

I ran into the problem wth a low-powered conductivity to frequency
transducer, where the scatter on the frequency versus conductivity
curve went up significantly at frequencies that gave harmonics close
to the resonance.

Conductivity is an interesting art- electrochemical effects etc. A
system I am familiar with uses a low audio frequency square wave to
excite the probe (zero DC content, of course, but the level of
excitation vs. the conductivity seems to be important as well).

Were you measuring the purity of the water inflow to the process?

A tantalum electrolytic in parallel with the ceramic chip did solve
the problem, but increased the power consumption. I ended up putting a
small wound inductor (10uH) in series with the ferrite bead to get a
predictable inductance and put a 22R resistor in series with that to
damp the resonance. The wound industor looked like a capacitor at the
high frequencies - tens of MHz - that I was actually worried about, so
I still needed the ferrite bead..

------
Bill Sloman, Nijmegen

Best regards,
Spehro Pefhany
--
"it's the network..." "The Journey is the reward"
speff@interlog.com Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com

 

[qrk]

On 27 Apr 2004 05:41:27 -0700, richardwilner@hotmail.com (Rich Wilner)
wrote:

If your analog stuff is sensitive to power supply noise, it is a good
idea to use ferrite beads between the digital and analog power
supplies. Ferrite is a religion. Include it in your everyday life.
The ferrite will prevent fast edges from propagating into your analog
power supply. A linear regulator feeding the analog circuitry works
wonders getting rid of the lower frequency (below 100 kHz) digital
noise.

Mark

hi mark and everyone
thanks again for all your responses. I'm going to describe this board
a little bit more, and then ask more questions!!
- I have a good amount of voltage, but not much current going through
my board (20vac p-p, but on the order of 20ma/channel x 8 channels for
analog, and 0-5v, 10ma/channel x 16 channels for digial and pwm).
- the fastest switching frequency i'll deal with for digital is
100khz. even when i clock data into my shift registers to configure
the analog switches, I do so around 50kHz (I am generating the clock
on a pin of my parallel port through visual basic).
- I suspect my analog section is sensitive to power supply noise. I
don't know this for sure, but until i put some 100uf caps on the rails
of my breadboard i was getting some serious HF oscillation.
- the board is complicated, from a layout perspective. there are lots
of components, i have 128 bits of memory (16x8bit shift registers),
each feeding 8 analog switches and 16 muxes to configure signal
routing, in addition to some signal processing circuitry, transistors
to drive indicator leds, etc. And, everything is DIP and thru-hole
because i need to build this thing by hand.

questions:
1) I am clueless what you guys are talking about with ferrite beads,
etc (inductors?). Please enlighten me.

Ferrite beads create lossy inductors at frequencies above 1 MHz. At
DC, they look like a short piece of wire. See Digi-Key M2103-ND for an
example. This part is handy for knocking out spikes on the power
supply caused by switching circuity (logic, power supplies, ...). As
Bill S. says, be sure to use bulk capacitance so you don't get
resonant problems at lower freqs.

If your using slow logic (rise and fall times, not clock speed), you
can probably get by without a bead. Fast edged signals tend to get
into naughty places if your not careful.

2) I am using ExpressSCH and ExpressPCB to lay this out, because the
software is free. it doesn't allow me to split ground or power
planes. Also, it allows linking of schematics and layouts via
netlists, but it doesn't create a layout automatically (which i would
tweak of course). what programs do you guys use/suggest (Eagle?)?

Make all your grounds the same net. To separate or isolate your
sensitive ground area, you should be able to draw a line as an
isolation entity if your plane layer is plotted out as a negative.
However, you need to manually keep track of your analog grounds. If
this isn't possible, then keep the digital stuff physically separate
from the analog and use one big ground plane.

Many in this group probably use, or are around, programs in the $5k
and up range (Protel, Orcad, PCAD, Mentor, Cadence, ...). Necessary
for the 3000+ pin designs that are so common these days.

3) is it smart to get my 5v for digital from my +15v via a 5v linear
regulator (7805xx)? a dc-dc converter would give me more isolation
but give me more problems with switching noise, and be a pain in the
butt to build/replace if it blew. A separate 5v supply is an option,
but it would be cleaner to just use one supply. If I use a linear
regulator and i split the gnd plane, the linear regulator is where i'd
have to connect agnd and dgnd.

If your logic doesn't consume massive amounts of power, a linear
regulator is fine.

thanks again, everyone for being so helpful to me. It blows my mind
that nobody teaches this stuff in school!!
Rich

From the sounds of things, your board layout doesn't look demanding.
You can probably get away with lots of slop and still have it work.
This stuff is hard to teach in school since most teachers don't have a
clue about circuit layout and students don't appreciate Ohm's Law. PCB
layout falls under specialized skill. Students have enough to learn
just to grasp the basics these days.

Mark

 

[Bill Sloman]

Spehro Pefhany <speffSNIP@interlogDOTyou.knowwhat> wrote in message news:<s0ss80phble1jnsqjd01g1e52gkuofkf9s@4ax.com>...

On 27 Apr 2004 07:05:13 -0700, the renowned bill.sloman@ieee.org (Bill
Sloman) wrote:

qrk <SpamTrap@reson.com> wrote in message news:<veor80h9cr56k4kvthcd2bo1i3bgc6sn0l@4ax.com>...
On 26 Apr 2004 12:59:32 -0700, richardwilner@hotmail.com (Rich Wilner)
wrote:

snipped good stuff

If your analog stuff is sensitive to power supply noise, it is a good
idea to use ferrite beads between the digital and analog power
supplies. Ferrite is a religion. Include it in your everyday life.
The ferrite will prevent fast edges from propagating into your analog
power supply. A linear regulator feeding the analog circuitry works
wonders getting rid of the lower frequency (below 100 kHz) digital
noise.

One word of warning about ferrite beads. Although the ferrite in the
bead is lossy, they look moderately high Q inductors with an
inductance of the order of 1uH at frequencies below a few MHz, and can
resonate with a 100nF decoupling capacitor to give quite a sharp
resonance at a few hundred kHz.

There is a huge range in impedance on the ferrite beads. Does your
statement apply in general?

"Of the order of 1uH" is pretty inspecific. Ferrite bead data sheets
rarely specify an inductance, but those that I've measured have tended
to come out not too far from a microhenry.

If your power rails are decoupled with an electrolytic capacitor as
well as a scattering of 100nF ceramic capacitors, the resonace moves
down to a few tens of kHz and the equivalent series resistance of the
electrolytic capacitor is enough to damp the resonance.

I ran into the problem wth a low-powered conductivity to frequency
transducer, where the scatter on the frequency versus conductivity
curve went up significantly at frequencies that gave harmonics close
to the resonance.

Conductivity is an interesting art- electrochemical effects etc. A
system I am familiar with uses a low audio frequency square wave to
excite the probe (zero DC content, of course, but the level of
excitation vs. the conductivity seems to be important as well).

Absolutely correct. I had to remember my chemistry lectures from forty
years ago to get to grips with some of the problems, and spend a long
afternoon in a university library to find a more up-to-date text
(which turned out to have been edited by a guy I'd known during my
post-doc time at Southampton).

Neither source was really up to job of dealing with the behavour of 2%
NaOH, where the ion concentration is high enough to affect the
hydration sphere around each ion, and we couldn't find an academic
expert on the subject anywhere in the Netherlands, so we ended up
winging it. The chemistry was the least of our worries.

Were you measuring the purity of the water inflow to the process?

No. The conductivity meter was build into a beer-bottle shaped
container designed to go through the bottle-washing machines in
breweries, where they wash the bottles with 2% NaOH at 80C -
conductivity 300mS/cm - and rinse with tap-water - conductivity
300uS/cm. The brewers want to known if the alkali concentration is up
to snuff at the start of the process, and if all the alkali has been
rinsed out of the bottle at the end, so I made the response non-linear
with a dog-leg around 3mS/cm.

------
Bill Sloman, Nijmegen

 

[Rich Wilner]

From the sounds of things, your board layout doesn't look demanding.
You can probably get away with lots of slop and still have it work.
This stuff is hard to teach in school since most teachers don't have a
clue about circuit layout and students don't appreciate Ohm's Law. PCB
layout falls under specialized skill. Students have enough to learn
just to grasp the basics these days.

Mark

Mark, and all--
just want to say thanks again. Without this newsgroup i'd be f***ed.
The fact that you think I can get away with lots of slop and still be
a happy guy is very encouraging. I like layout, so maybe this will be
the start of something good for me!!
I'll post when i've got this beast in a cage.
Rich

 

[Phil Hobbs]

Tam/WB2TT wrote:

Somebody had suggested we use linear regulators to clean up the RF VCC. This
did nothing. They provide no reduction of input noise above a few hundred
KHz other than that provided by the input and output bypass caps.

What you want is a capacitance multiplier, at least if you can stand the
voltage drop. They do wonders for getting rid of junk on power planes
that regulators don't touch.

Cheers,

Phil Hobbs

 

[Bill Sloman]

richardwilner@hotmail.com (Rich Wilner) wrote in message news:<e5e18e0f.0404270441.52baf85@posting.google.com>...

If your analog stuff is sensitive to power supply noise, it is a good
idea to use ferrite beads between the digital and analog power
supplies. Ferrite is a religion. Include it in your everyday life.
The ferrite will prevent fast edges from propagating into your analog
power supply. A linear regulator feeding the analog circuitry works
wonders getting rid of the lower frequency (below 100 kHz) digital
noise.

Mark

hi mark and everyone
thanks again for all your responses. I'm going to describe this board
a little bit more, and then ask more questions!!
- I have a good amount of voltage, but not much current going through
my board (20vac p-p, but on the order of 20ma/channel x 8 channels for
analog, and 0-5v, 10ma/channel x 16 channels for digial and pwm).
- the fastest switching frequency i'll deal with for digital is
100khz. even when i clock data into my shift registers to configure
the analog switches, I do so around 50kHz (I am generating the clock
on a pin of my parallel port through visual basic).
- I suspect my analog section is sensitive to power supply noise.

Most analog circuits are. Data sheets normally give plots of power
supply rejection ratios (PSRR) against the frequency of the ripple on
the power rails, and the rejection ratio tends to be quite low at high
frequencies.

I don't know this for sure, but until i put some 100uf caps on the rails
of my breadboard i was getting some serious HF oscillation.
- the board is complicated, from a layout perspective. there are lots
of components, i have 128 bits of memory (16x8bit shift registers),
each feeding 8 analog switches and 16 muxes to configure signal
routing, in addition to some signal processing circuitry, transistors
to drive indicator leds, etc. And, everything is DIP and thru-hole
because i need to build this thing by hand.

questions:
1) I am clueless what you guys are talking about with ferrite beads,
etc (inductors?). Please enlighten me.

Ferrite chips and beads are the simplest possible inductor, a length
of straight wire or printed conductor surrounded by ferrite. The
inductance is low - of the order of a microhenry, though this depends
heavily on the sort of ferrite involved - but unlike wound inductors
there is hardly any parallel capacitance, so that unlike conventional
wound inductors, ferrite beads don't really have a resonant frequency,
and don't start looking like small capacitors at frequencies above
this resonance.

In fact the ferrite is usually chosen to be lossy, so that the
impedance presented by the ferrite bead or chip starts looking
resistive rather than inductive as sufficently high frequencies. The
high frequency resistance is typically of the order of 70R, but
Farnell's stock of ferrite chips ranges from 30R to 1000R.

They can be very useful for keeping the high frequency switching
spikes from digital components from getting into the analog power
rails.

2) I am using ExpressSCH and ExpressPCB to lay this out, because the
software is free. it doesn't allow me to split ground or power
planes. Also, it allows linking of schematics and layouts via
netlists, but it doesn't create a layout automatically (which i would
tweak of course). what programs do you guys use/suggest (Eagle?)?

http://www.terrypin.dial.pipex.com/ECADList.html

3) is it smart to get my 5v for digital from my +15v via a 5v linear
regulator (7805xx)? a dc-dc converter would give me more isolation
but give me more problems with switching noise, and be a pain in the
butt to build/replace if it blew. A separate 5v supply is an option,
but it would be cleaner to just use one supply. If I use a linear
regulator and i split the gnd plane, the linear regulator is where i'd
have to connect agnd and dgnd.

The 5V linear regulator run from the +15V line could be a good
solution, but you want a good input filter to make sure that the
current spikes sucked out of the +5V digitak rail during switching
don't pull down the +15V rail and mess up your analog.

Work out your worst case current demand, and put chose a resistor that
won't drop more than 5V, and won't burn out at at this current. Put
the resistor between the +15V rail and the input side of your 5V
regulator. Add a capacitor from the input side of your 5V regulator to
ground - the regulator's data sheet will tell you how much capacitance
you will need - and if it has to be an electrolytic capacitor, bypass
it with a 100nF ceramic disk or chip tp provide a low impedance path
for high frequency ripple current.

-------
Bill Sloman, Nijmegen