pcb&bitstream

G

geobsd

Guest
hi all
i stupidly bought 5 spartan 3E when i just understoud the power of
fgpa !
so now i need a not expensive fgpa-pcb maker to put the 5 spartan in
my tablet
also i need the bitstream spec to directly use fgpas on my tablet !
unlike else *pu i can't find the doc to direct programming it and
xilinx give no answer to not affiliated people !!!
thanks
_________________
http://opencores.org/project,smart-non-binary-computing,overview
 
hi all
i stupidly bought 5 spartan 3E when i just understoud the power of
fgpa !
so now i need a not expensive fgpa-pcb maker to put the 5 spartan in
my tablet
also i need the bitstream spec to directly use fgpas on my tablet !
unlike else *pu i can't find the doc to direct programming it and
xilinx give no answer to not affiliated people !!!
thanks
_________________
http://opencores.org/project,smart-non-binary-computing,overview
The bitstream format is not published.
Download the ISE Webpack tools to enable you to generate a bitstream.

However, your best plan is probably to sell off the chips. Bespoke PC
design and build is both difficult and expensive, especially fo
hobbyists.


---------------------------------------
Posted through http://www.FPGARelated.com
 
"geobsd" <geobsd.os@gmail.com> wrote in message
news:50d241f8-27a5-4308-8b81-1e515a045346@q14g2000vbf.googlegroups.com...
hi all
i stupidly bought 5 spartan 3E when i just understoud the power of
fgpa !
Just the FPGAs?

so now i need a not expensive fgpa-pcb maker to put the 5 spartan in
my tablet
What tablet?

What interface?

also i need the bitstream spec to directly use fgpas on my tablet !
unlike else *pu i can't find the doc to direct programming it and
It's not a CPU it's a programmable logic device. You don't program it you
define how the logic will operate and configure it.

xilinx give no answer to not affiliated people !!!
thanks
There's plenty of information on the web site!

:)


Nial.
 
Just the FPGAs?
yes !

What tablet?
a chineese tablet 8" with a freescale IMX5

What interface?
well i'm not sure what's in it without open it (i will destroy the
back soon)
usb-otg, wifi sure

It's not a CPU it's a programmable logic device. You don't program it you
define how the logic will operate and configure it.
that's what i call programme fgpa, you can't programme cpu you
programme on it, we are ok here !

There's plenty of information on the web site!
i didn't found good information to direct use of fpga without made
bitstream yet, and my tablet will run my OS, ISE&al are dead for me !

thanks Nial
 
The bitstream format is not published.
that's a shame !
unlike else *pu we can't use freely !

Download the ISE Webpack tools to enable you to generate a bitstream.
i'll do this in last thing if i don't decode the spec by myself :(

However, your best plan is probably to sell off the chips.
must i suicide too ?

Bespoke PCB
design and build is both difficult and expensive, especially for
hobbyists.
what about reflow oven ?

thanks RCIngham
 
On Mar 10, 10:06 am, geobsd <geobsd...@gmail.com> wrote:
Just the FPGAs?

yes !

What tablet?

a chineese tablet 8" with a freescale IMX5

What interface?

well i'm not sure what's in it without open it (i will destroy the
back soon)
usb-otg, wifi sure

It's not a CPU it's a programmable logic device. You don't program it you
define how the logic will operate and configure it.

that's what i call programme fgpa, you can't programme cpu you
programme on it, we are ok here !

There's plenty of information on the web site!

i didn't found good information to direct use of fpga without made
bitstream yet, and my tablet will run my OS, ISE&al are dead for me !

thanks Nial
I don't think that you fully understand what an FPGA is and how it is
used. The free ISE WebPack software will running on a Windows or
Linux PC to design the logic that will go into the FPGA and to
generate the bitstream to configure the bitstream.

Have you read the Spartan-3E datasheet?
www.xilinx.com/support/documentation/data_sheets/ds312.pdf

What are you trying to accomplish with this project?

Ed McGettigan
--
Xilinx Inc.
 
hi Ed

i understoud, after buying those, that fgpas can't be used directly in
any OS !
strangely it is the most flexible PU too (and that's why i bought 5)

my project is to have dynamic generation of bitstream to have a very
powerfull tablet in any usage !

i don't say protyping or R&D is bad but limit fpgas to those fields
only is a non-sense !

childs play to push the wheele but later they learn to use them to
make bicycle ;)
i understand that my way will be hard, i didn't saw anyone doing
bicycle yet, ~np i have harder to live in my life !

@bientôt
 
On Mar 10, 8:41 pm, Ed McGettigan <ed.mcgetti...@xilinx.com> wrote:
What are you trying to accomplish with this project?

Ed McGettigan
--
Xilinx Inc.
It seems the OP is expecting an FPGA to already be doing everything
that it could do without his having to do anything but purchase them.

What is the ordering code for a Spartan that is pre-programmed with
all possible applications? Does Digi-key have stock? Can you post
the link to that bit-stream?

;)
 
On Mar 11, 3:38 am, geobsd <geobsd...@gmail.com> wrote:
hi Ed

i understoud, after buying those, that fgpas can't be used directly in
any OS !
strangely it is the most flexible PU too (and that's why i bought 5)

my project is to have dynamic generation of bitstream to have a very
powerfull tablet in any usage !

i don't say protyping or R&D is bad but limit fpgas to those fields
only is a non-sense !

childs play to push the wheele but later they learn to use them to
make bicycle ;)
i understand that my way will be hard, i didn't saw anyone doing
bicycle yet, ~np i have harder to live in my life !

@bientôt
FPGAs are not limited to prototyping or R&D. If you take a look at
the revenue of Xilinx of Altera you will see that it about $4B
annually. You can't do that with low volumes.

Many startup companies have been started and failed over the years
trying to mate FPGAs with CPUs as co-processors, but the general
purpose computing space really isn't a good fit. Companies have used
FPGAs to create very high end data processing engines to tackle
encryption/decryption, real-time video processing and simulation
acceleration engines. Usually these are dedicated platforms, but
sometimes they are created as expansion cards for PC servers.

When you start reading the Spartan-3E data sheet and the user guides
in your quest for dynamic bitstream generation you should quickly come
to understand the vast complexities that this entails and why it isn't
a practical design flow.

Ed McGettigan
--
Xilinx Inc.
 
On 12 Mrz., 05:27, Ed McGettigan <ed.mcgetti...@xilinx.com> wrote:
 Companies have used
FPGAs to create very high end data processing engines to tackle
encryption/decryption, real-time video processing and simulation
acceleration engines.  Usually these are dedicated platforms, but
sometimes they are created as expansion cards for PC servers.
This reminds me of my favorite quote regarding computer architecture:
"Special purpose hardware is always faster than general purpose
hardware,
except in the general case!"

An advice to the OP:
FPGAs are great, but they definitely are more difficult to use than
MCUs.
Try to answer your question first for an ARM MCU. (Designing the
board,
how to solder it, how to program it with no OS, how to connect it to
your tablet, how to
design the power supply, ...)
Once you understood all that, you can continue with the FPGA specific
questions:
How to design the circuits going into the FPGA, how to do dynamic
reconfiguration,
how to encode the bitstream, etc.

Have fun,

Kolja
 
On Mar 11, 5:52 pm, NeedCleverHandle <d_s_kl...@yahoo.com> wrote:

It seems the OP is expecting an FPGA to already be doing everything
that it could do without his having to do anything but purchase them.
re read what i wrote !
What is the ordering code for a Spartan that is pre-programmed with
all possible applications?  Does Digi-key have stock?  Can you post
the link to that bit-stream?
;)
ok mister joker, i repeat i want for some usages having the abilty to
use my fgpas by direct programming !
i don't need to make a vhdl simulation, on an other pc (with an OS i
don't use), to finaly have the bit-stream i want !
for some "work"(i'm not paid) i'll use vhdl but for some elses dynamic-
bit-stream !
 
geobsd wrote:
ok mister joker,
bonjour,

i repeat i want for some usages having the abilty to
use my fgpas by direct programming !
(sorry, french ahead)

si c'était possible, d'autres l'auraient fait bien avant.
il y a bien eu des systčmes avec reprogrammation partielle
mais le temps de générer la nouvelle config est énormément
plus long que le chargement lui-męme...
comme tu as vu, la situation est bien plus complexe et désespérée.
c'est terrible mais c'est comme ça :-/
quant aux projets pour faire des FPGA "open source"
ça a été des échecs cuisants. mais on ne désespčre pas,
la situation actuelle est déjŕ tellement meilleure qu'il y a 10 ans
(pour le fun regarde ce vestige du passé :
http://f-cpu.seul.org/new/VHDL-HOWTO.f-cpu
alors qu'aujourd'hui, un coup de GHDL et c'est fini )

i don't need to make a vhdl simulation, on an other pc (with an OS i
don't use), to finaly have the bit-stream i want !
you seem to believe that FPGA are magic boxes that "do what you want".
though there is no magic, on the contrary, because in order to get
what we want, we have to go through countless tedious steps...
particularly because each single technical detail is driven
by very complex compromises.

just as a thought exercise, which will help your definition
and help us helping you :
what are your expectations ?
how will you generate the bitstream ?
what will your input be ?
sure you don't want VHDL, or Verilog,
but then what would your system be ? binary decision graphs ?
what are your constraints, your application field,
your targets, your goals, your expected results ?

for some "work"(i'm not paid) i'll use vhdl but for some elses dynamic-
bit-stream !
do you already use VHDL ?
did you ever use a logic synthesiser ?

contact me in private if you have time.

yg (ŕ le premier lien)
--
http://ygdes.com / http://yasep.org
 
hi Christophe,

geobsd wrote:
prototyping also mean that lot of fgpas consumers have to buy a lot of
fgpas to sell the result of prototyping
please quantify "a lot" :)

Many startup companies have been started and failed over the years
trying to mate FPGAs with CPUs as co-processors
as i'm alone, for me, i have nothing to fail : my goal is only to use
my fpgas ;)
as everybody here :)
welcome aboard !

i saw less normal usages too (on the net)
please share your finds !

it's not cause you don't imagine as me that i must do how you tell !
Hmmm sorry but the little I know about Ed lets me suppose he knows
a lot about his company's product's use (intended or not :p)

your softwares Ed include a bit-stream compilateur,
now, just wonder what input format this compiler uses,
and where it comes from. the compiler i know uses EDIF,
does that sound familiar ?

it impli that it
know how to programme my fpgas it will be not very difficult to use
this (if i had the source);
there, i think that you dream...
ask Microsoft for their kernel's source, ok (there are certain types
of contracts that allow it, yet extremely expensive, but it's still possible)
ask Xilinx or Altera for the source code of their compilers :
that is .... yeah, a pure dream. it's a very highly guarded secret.
writing your own would be faster, if it was ever possible.
well, Sébastien Bourdeauduc has some ideas about this
but i'm not sure it works with your S3E.

it will not change (vhdl + fpga) usage,
you will not loose any consumers !
i didn't said my OS will be a normal one !!!
ah, your exokernel ? :)

Ed McGettigan
Xilinx Inc.
if i spend too much time to know how to use those fpgas without using
your softwares in some OS i don't want to use, i may have a
functionnal demo for my project before :
http://opencores.org/project,smart-non-binary-computing,overview
Created: Mar 4, 2011
Updated: Mar 11, 2011
SVN: No files checked in
Category: Other
Language: Other
Development status: Planning
Additional info: none
WishBone Compliant: No

this project is about a way to make non-binary computing !!!
(yes the title already said it)
cells in place of one electron use photons (led, oled, nano crystal, ...)s
(this way look the less expensive, there are elses)
to be smart : with ofet-amoled it will keep data even on power loss
also it can be highly secure : loading of color maps can take place before it realy start !
you are welcome to play with infinity of models
(just imagine for now)

* if it's not binary, then what coding system will it use ?
* who will fabricate your photonic chips ?
etc. etc.

and once tasted your fgpas will not be as good mine !
sure.
i'm waiting to see so I can finally run F-CPU with it :)

so i'll not try to use them as i want in the end !
np my 5 spartan 3E 500k will be used even with your vhdl usage
restriction
what restriction ?

VHDL is so much more convenient than EDIF... at least to me.

anyway as you can restrict small consumers to use the hardware you
sell as you want i will restrict all my projects to be open only for
non-xilinx&affiliated companies !
sure, it's your right.
what would be the benefit of this restriction ?

sadly for you i didn't bought altera, you have one week to decide if
you can publish the bit-stream specs of old products before i restrict
all my open-sources projects with a "no-xilinx&al license" !
*tumbleweed*

huh, yeah, ok... that sounds impressive.

if xilinx can't respect me cause i'm not a big buyer it's not my
problem !
note for later : no company respects anything. why would you expect
Xilinx to be different ? deal with it :-/

I think that you still have a lot of things to learn about how
this industry works. I never say it's fair or good, but if you want
to get something done one day, you'll have to understand
and practice many many things.

This is why I do mostly electronics design, instead of pure software.

thanks again Ed !
we're all watching you and wishing you good luck.
you seem to be passionate and driven by ideals,
so at least something good must result from this :)

yg
--
http://ygdes.com / http://yasep.org
 
hi Ed

FPGAs are not limited to prototyping or R&D.  If you take a look at
the revenue of Xilinx of Altera you will see that it about $4B
annually.  You can't do that with low volumes.
prototyping also mean that lot of fgpas consumers have to buy a lot of
fgpas to sell the result of prototyping

Many startup companies have been started and failed over the years
trying to mate FPGAs with CPUs as co-processors
as i'm alone, for me, i have nothing to fail : my goal is only to use
my fpgas ;)

but the general
purpose computing space really isn't a good fit.  Companies have used
FPGAs to create very high end data processing engines to tackle
encryption/decryption, real-time video processing and simulation
acceleration engines.  Usually these are dedicated platforms, but
sometimes they are created as expansion cards for PC servers.
i saw less normal usages too (on the net)
it's not cause you don't imagine as me that i must do how you tell !

When you start reading the Spartan-3E data sheet and the user guides
in your quest for dynamic bitstream generation you should quickly come
to understand the vast complexities that this entails and why it isn't
a practical design flow.
your softwares Ed include a bit-stream compilateur, it impli that it
know how to programme my fpgas it will be not very difficult to use
this (if i had the source); it will not change (vhdl + fpga) usage,
you will not loose any consumers !
i didn't said my OS will be a normal one !!!

Ed McGettigan
Xilinx Inc.
if i spend too much time to know how to use those fpgas without using
your softwares in some OS i don't want to use, i may have a
functionnal demo for my project before :
http://opencores.org/project,smart-non-binary-computing,overview
and once tasted your fgpas will not be as good mine !
so i'll not try to use them as i want in the end !
np my 5 spartan 3E 500k will be used even with your vhdl usage
restriction
anyway as you can restrict small consumers to use the hardware you
sell as you want i will restrict all my projects to be open only for
non-xilinx&affiliated companies !
sadly for you i didn't bought altera, you have one week to decide if
you can publish the bit-stream specs of old products before i restrict
all my open-sources projects with a "no-xilinx&al license" !
if xilinx can't respect me cause i'm not a big buyer it's not my
problem !
thanks again Ed !
 
An advice to the OP:
FPGAs are great, but they definitely are more difficult to use than
MCUs.
how can you know what is difficult with another point of view you
don't have ?

Try to answer your question first for an ARM MCU. (Designing the
board,
how to solder it, how to program it with no OS, how to connect it to
your tablet, how to
design the power supply, ...)
Once you understood all that, you can continue with the FPGA specific
questions:
How to design the circuits going into the FPGA, how to do dynamic
reconfiguration,
how to encode the bitstream, etc.

Have fun,
yes interesting for me ;)
thanks Kolja
 
salut whygee !
si c'était possible, d'autres l'auraient fait bien avant.
super arg !

il y a bien eu des systčmes avec reprogrammation partielle
mais le temps de générer la nouvelle config est énormément
plus long que le chargement lui-męme...
comme tu as vu, la situation est bien plus complexe et désespérée.
c'est terrible mais c'est comme ça :-/
quant aux projets pour faire des FPGA "open source"
ça a été des échecs cuisants. mais on ne désespčre pas,
la situation actuelle est déjŕ tellement meilleure qu'il y a 10 ans
(pour le fun regarde ce vestige du passé :http://f-cpu.seul.org/new/VHDL-HOWTO.f-cpu
alors qu'aujourd'hui, un coup de GHDL et c'est fini )
GHDL => spartan 3E bit-stream !?!

i don't need to make a vhdl simulation, on an other pc (with an OS i
don't use), to finaly have the bit-stream i want !

you seem to believe that FPGA are magic boxes that "do what you want".
though there is no magic, on the contrary, because in order to get
what we want, we have to go through countless tedious steps...
particularly because each single technical detail is driven
by very complex compromises.
it depend the compromise and the operations the fgpas have to do ...
once again i never said i'll never use vhdl for some bit-stream, i
said it will be very annoying and slow for some things !

just as a thought exercise, which will help your definition
and help us helping you :
what are your expectations ?
only use my fpgas (as i want if possible)

how will you generate the bitstream ?
from small chunks i think now but i'm open ;)

what will your input be ?
the range is from sensors to the cpu !

sure you don't want VHDL, or Verilog
i'll learn vhdl !

but then what would your system be ? binary decision graphs ?
the OS will be a mix of exo and micro kernel, the fpgas should be used
in all possibles ways !

what are your constraints, your application field,
your targets, your goals, your expected results ?
i will feel at school if you continue ;)
i have no constraints, field, targets
my goal is only to learn and use my fpgas !
i expect to reach my goal here !

did you ever use a logic synthesiser ?
is my brain ok !?!
;)

contact me in private if you have time.
i will not annoy you if you don't have a quick way for a 5 fpga pcb
now !
maybe later ;)

many thanks
 
On Mar 12, 5:50 pm, whygee <y...@yg.yg> wrote:
hi Christophe,
re

please quantify "a lot" :)
at nose view 75%

welcome aboard !
thanks !

please share your finds !
google give nice result

it's not cause you don't imagine as me that i must do how you tell !

Hmmm sorry but the little I know about Ed lets me suppose he knows
a lot about his company's product's use (intended or not :p)
did i said he is an idiot !?

your softwares Ed include a bit-stream compilateur,

now, just wonder what input format this compiler uses,
and where it comes from. the compiler i know uses EDIF,
does that sound familiar ?
not familar but it will come

 > it impli that it> know how to programme my fpgas it will be not very difficult to use
this (if i had the source);

there, i think that you dream...
no ;)

ask Xilinx or Altera for the source code of their compilers :
that is .... yeah, a pure dream. it's a very highly guarded secret.
i don't care of the result !
i ask to not be a traitor !

writing your own would be faster, if it was ever possible.
well, Sébastien Bourdeauduc has some ideas about this
but i'm not sure it works with your S3E.
ok i'll see

ah, your exokernel ? :)
yes

http://opencores.org/project,smart-non-binary-computing,overview
* if it's not binary, then what coding system will it use ?
i didn't put a name on the many possible choices ;)

* who will fabricate your photonic chips ?
many sell screens and else parts...

what restriction ?
40% selling price of the final product the affiliated or xilinx will
have to give to use anything of my projects

VHDL is so much more convenient than EDIF... at least to me.
you are human, not a cpu ;)

anyway as you can restrict small consumers to use the hardware you
sell as you want i will restrict all my projects to be open only for
non-xilinx&affiliated companies !

sure, it's your right.
what would be the benefit of this restriction ?
none for xilinx


sadly for you i didn't bought altera,  you have one week to decide if
you can publish the bit-stream specs of old products before i restrict
all my open-sources projects with a "no-xilinx&al license" !

*tumbleweed*

huh, yeah, ok... that sounds impressive.
no but to not lie i have to tell it !

if xilinx can't respect me cause i'm not a big buyer it's not my
problem !

note for later : no company respects anything. why would you expect
Xilinx to be different ? deal with it :-/

I think that you still have a lot of things to learn about how
this industry works. I never say it's fair or good, but if you want
to get something done one day, you'll have to understand
and practice many many things.
;)
i know...

This is why I do mostly electronics design, instead of pure software.
lucky you !

thanks again Ed !

we're all watching you and wishing you good luck.
you seem to be passionate and driven by ideals,
so at least something good must result from this :)
i am, i have no hate for Ed, the poor should not really understand why
i'm not happy with my fpga...
anyway i usualy do what i said, maybe i'm nothing maybe not
@bientôt
 
On Mar 12, 8:56 am, geobsd <geobsd...@gmail.com> wrote:
hi Ed

FPGAs are not limited to prototyping or R&D.  If you take a look at
the revenue of Xilinx of Altera you will see that it about $4B
annually.  You can't do that with low volumes.

prototyping also mean that lot of fgpas consumers have to buy a lot of
fgpas to sell the result of prototyping

Many startup companies have been started and failed over the years
trying to mate FPGAs with CPUs as co-processors

as i'm alone, for me, i have nothing to fail : my goal is only to use
my fpgas ;)

but the general
purpose computing space really isn't a good fit.  Companies have used
FPGAs to create very high end data processing engines to tackle
encryption/decryption, real-time video processing and simulation
acceleration engines.  Usually these are dedicated platforms, but
sometimes they are created as expansion cards for PC servers.

i saw less normal usages too (on the net)
it's not cause you don't imagine as me that i must do how you tell !

When you start reading the Spartan-3E data sheet and the user guides
in your quest for dynamic bitstream generation you should quickly come
to understand the vast complexities that this entails and why it isn't
a practical design flow.

your softwares Ed include a bit-stream compilateur, it impli that it
know how to programme my fpgas it will be not very difficult to use
this (if i had the source); it will not change (vhdl + fpga) usage,
you will not loose any consumers !
i didn't said my OS will be a normal one !!!

Ed McGettigan
Xilinx Inc.

if i spend too much time to know how to use those fpgas without using
your softwares in some OS i don't want to use, i may have a
functionnal demo for my project before :http://opencores.org/project,smart-non-binary-computing,overview
and once tasted your fgpas will not be as good mine !
so i'll not try to use them as i want in the end !
np my 5 spartan 3E 500k will be used even with your vhdl usage
restriction
anyway as you can restrict small consumers to use the hardware you
sell as you want i will restrict all my projects to be open only for
non-xilinx&affiliated companies !
sadly for you i didn't bought altera, you have one week to decide if
you can publish the bit-stream specs of old products before i restrict
all my open-sources projects with a "no-xilinx&al license" !
if xilinx can't respect me cause i'm not a big buyer it's not my
problem !
thanks again Ed !
Christophe,

It appears that you have your mind set on a specific course of
action. It really isn't clear what that course of action is as your
responses and comments in this and other threads over the last couple
of days are quite confusing. Potentially this due to French/English
language issues, but some of it appears to be that you don't
understand some basic FPGA, logic and hardware design concepts.

In a recent post you said "how can you know what is difficult with
another point of view you don't have ?" Take a moment and consider
this along with the replies that you have received from a diverse set
of people here.

If you think that you will get farther in your goal by using FPGAs
from Altera, Lattice, Microsemi (aka Actel), or QuickLogic then you
should absolutely switch over. However, Xilinx has had a long history
supporting reconfigurable computing research. I was the main driver
behind the development and release of first Virtex bitstream
architecture documentation that resulted in XAPP151 and XAPP153. Both
of these documents opened the bitstream format to enable partial
reconfiguration design methods for use by Xilinx customers and
researchers. Equivalent information that is in XAPP151 can now be
found in each FPGA family's Configuration User Guide.

The same level of bistream architecture disclosure or partial
reconfiguration support is not available from any other FPGA vendor.
However what you will not find in this material are direct
relationships between any specific bit and a specific functionality.
This information is extremely complex, has a high level of variability
within a FPGA family and changes completely from one family to
another. This isn't the same as documentating an ISA and a register
map for a CPU or peripheral device that has one task and runs at one
clock frequency it would be 10,000 times more complex to fully
document the entire FPGA configuration map.

There were attempts to develop non-ISE design flows and a research
vehicle called Jbits was developed and released by Xilinx that
supported some of the Virtex, Virtex-E and Virtex-II families (no
support for Spartan-3E that I am aware of). Jbits was not extremely
useful beyond academic research as it lacked elements that would allow
for building a robust and reliable design, features like simulation
and timing analysis. No similiar vehicle has ever been released by
another FPGA vendor.

Best of luck in your endeavor,

Ed McGettigan
--
Xilinx Inc.
 
On 12 Mrz., 19:10, geobsd <geobsd...@gmail.com> wrote:

is my brain ok !?!
;)
Finally, the correct question... (Sorry, could not resist, please do
not take it personally ;-)

If you really want to learn something about FPGA, sell your 5 Spartans
and buy a cheap evaluation-kit instead...

But beside FPGA, I think you should also learn some other lessons,
e.g. how to deal with people that want to help you. E.g. giving a
Xilinx-representative a ultimatum for suppling there source-code is
plain stupid: It is like wanting to get the recipe from Coca-Cola
within 1 week, otherwise you will never ever buy a coke again. Before
you even ever drank a coke, because you didn't figure out how to.

I think you should try to get a more realistic and less emotional view
of things.

Regards,

Thomas
 
Ed,

i insist on special things because the usual ones are ok with xilinx
yes my english is bad !
a programmable device is programmed to "work" even if it's not the
usual langage !
i don't think else fpga makers are best
i don't even need a full doc of the map, just the complet map the same
you have in your compiler

Best of luck in your endeavor,
thanks Ed
 

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