M
Martin Devera
Guest
Hi,
I'm rather programmer than electronics designer but I wanted to design wideband
LNA. Unfortunately when I created design with coupled inductors and run TRAN
and then AC I got bad results. When I run AC and then TRAN all was ok.
So I looked at sources and found (after 10 hours of learning spice
principles :-( ) something which looks as bug.
See patch below. I'm interested if someone can commit my fix...
------------------------
Martin Devera aka devik
Linux QoS/HTB maintainer
--- indload.c.orig Thu Feb 12 00:23:30 2004
+++ indload.c Thu Feb 12 00:24:51 2004
@@ -67,9 +67,14 @@
*(ckt->CKTstate0 + muthere->MUTind2->INDflux) +=
muthere->MUTfactor * *(ckt->CKTrhsOld+
muthere->MUTind1->INDbrEq);
- }
+ /* } devik@cdi.cz 12.2.2004: these probably should be loaded only if
+ transient analyse is run. It is because ckt->CKTag[0] remains set
+ after such prev transient run and this then loads nonsence value
+ into the admittance matrix for OP/DC analyses. I have circuit which
+ demonstrates it. */
*(muthere->MUTbr1br2) -= muthere->MUTfactor*ckt->CKTag[0];
*(muthere->MUTbr2br1) -= muthere->MUTfactor*ckt->CKTag[0];
+ }
}
}
itype = CKTtypelook("Inductor");
I'm rather programmer than electronics designer but I wanted to design wideband
LNA. Unfortunately when I created design with coupled inductors and run TRAN
and then AC I got bad results. When I run AC and then TRAN all was ok.
So I looked at sources and found (after 10 hours of learning spice
principles :-( ) something which looks as bug.
See patch below. I'm interested if someone can commit my fix...
------------------------
Martin Devera aka devik
Linux QoS/HTB maintainer
--- indload.c.orig Thu Feb 12 00:23:30 2004
+++ indload.c Thu Feb 12 00:24:51 2004
@@ -67,9 +67,14 @@
*(ckt->CKTstate0 + muthere->MUTind2->INDflux) +=
muthere->MUTfactor * *(ckt->CKTrhsOld+
muthere->MUTind1->INDbrEq);
- }
+ /* } devik@cdi.cz 12.2.2004: these probably should be loaded only if
+ transient analyse is run. It is because ckt->CKTag[0] remains set
+ after such prev transient run and this then loads nonsence value
+ into the admittance matrix for OP/DC analyses. I have circuit which
+ demonstrates it. */
*(muthere->MUTbr1br2) -= muthere->MUTfactor*ckt->CKTag[0];
*(muthere->MUTbr2br1) -= muthere->MUTfactor*ckt->CKTag[0];
+ }
}
}
itype = CKTtypelook("Inductor");