Passing a function a reference to an associative array in Sy

  • Thread starter rajatkmitra@gmail.com
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rajatkmitra@gmail.com

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Hi folks,
I am passing a refernce to an associative array as follows -
=========++==============++===============++=====================
//The following function scans the shadow memory ( this
// is the write array that recorded all prior write
//transactions ).

function bit check_valid( ref write_trans_c shadow_mem[*] );


//int p = 0;


check_valid=1'b0;


//while(p < shadow_mem.size())begin


foreach (shadow_mem[p])begin
if( (shadow_mem[p].row_addr == this.row_addr) &&
(shadow_mem[p].col_addr == this.col_addr) &&
(shadow_mem[p].bank_addr == this.bank_addr) &&
(shadow_mem[p].chip_sel == this.chip_sel) )begin
check_valid=1'b1;
end
//p++;
end


endfunction : check_valid
=========++==============++===============++=====================


This compiles correctly is vcs2006.06 but yields the following error
message in
ModelSim 6.2g


D:\PROJECTS>vlog -sv -f run.f
Model Technology ModelSim SE vlog 6.2g Compiler 2007.02 Feb 21 2007
-- Compiling module queue
** Error: ./verif/read_trans.svh(105): near "shadow_mem": syntax
error, unexpected "IDENTIFIER", expecting ')'


I know that VCS tends to be a lineant about Sys Verilog syntax....But
is what I have the right way ???


Thanks,


Rajat Mitra
Vektor Automation Inc.
 
On 12 May 2007 16:19:35 -0700, "rajatkmitra@gmail.com"
<rajatkmitra@gmail.com> wrote:

Hi folks,
I am passing a refernce to an associative array as follows -

function bit check_valid( ref write_trans_c shadow_mem[*] );

foreach (shadow_mem[p])begin
Click to expand...

This compiles correctly is vcs2006.06 but yields the following error
message in ModelSim 6.2g
Click to expand...
Questa 6.3 beta 3 reports the "foreach" as an error because it
thinks that "foreach" is illegal on wildcard-indexed associative
arrays, but it has no problem with the ref argument. So it
may be that this was a bug in 6.2g that's now fixed.
If you make the associative array subscripted by [int], it
all works OK.

In the past, VCS support for associative arrays
was limited to only [*], not specific types. Maybe that
restriction is now lifted? Haven't checked recently.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
On May 13, 5:50 am, Jonathan Bromley <jonathan.brom...@MYCOMPANY.com>
wrote:
On 12 May 2007 16:19:35 -0700, "rajatkmi...@gmail.com"

rajatkmi...@gmail.com> wrote:
Hi folks,
I am passing a refernce to an associative array as follows -
function bit check_valid( ref write_trans_c shadow_mem[*] );

foreach (shadow_mem[p])begin
This compiles correctly is vcs2006.06 but yields the following error
message in ModelSim 6.2g

Questa 6.3 beta 3 reports the "foreach" as an error because it
thinks that "foreach" is illegal on wildcard-indexed associative
arrays, but it has no problem with the ref argument. So it
may be that this was a bug in 6.2g that's now fixed.
If you make the associative array subscripted by [int], it
all works OK.

In the past, VCS support for associative arrays
was limited to only [*], not specific types. Maybe that
restriction is now lifted? Haven't checked recently.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.brom...@MYCOMPANY.comhttp://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
Click to expand...
Hi Jonathan,
Okay, so I actually tried something else -

1) As you may have noticed that this function is actually a method in
a class called read_trans_c.
2) On adding `include "write_trans_c" to the read_trans_c.sv file
(that defines the class )the compile works.
3) Somehow VCS automatically treats object arguments to class method
as the equivalent of C - externs and thus eventually
picks up class definitions during compile form the apropriate files.
Modelsim does not appear to do this.
4) Funny thing is that when I actually use the method in a program and
pass the reference of the associative
array; in windows( not linux), I get a runtime error saying that the
reference does not exist !!!

I guess I need to file this as a bug for Questa 6.3 ? Modelsim 6.2g

Thanks,
Rajat
 
On 14 May 2007 10:41:54 -0700, "rajatkmitra@gmail.com"
<rajatkmitra@gmail.com> wrote:

1) As you may have noticed that this function is actually a method in
a class called read_trans_c.
Click to expand...
I had not noticed, because you didn't say so :) There was
no such context in your original post.

2) On adding `include "write_trans_c" to the read_trans_c.sv file
(that defines the class )the compile works.
Click to expand...
Again, I assumed that this was something you had taken
care of. Seems to me that Questa is absolutely right in
rejecting the argument if you use a type name it has never
seen before.

3) Somehow VCS automatically treats object arguments to class method
as the equivalent of C - externs and thus eventually
picks up class definitions during compile form the apropriate files.
Click to expand...
hmmm, I don't think this is correct behaviour but I guess I had
better go check the LRM...

4) Funny thing is that when I actually use the method in a program and
pass the reference of the associative
array; in windows( not linux), I get a runtime error saying that the
reference does not exist !!!
Click to expand...
I don't quite follow what you're saying here. If you have an
example that behaves differently in Questa on Linux than on Windows,
then I guess that difference is in itself a bug and should be
reported. But I can't guess which is right without seeing the
example code - all of it :)
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
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