Partial Reconfiguration

[ssaleem]

Can someone tell me about the steps to partially reconfigure Vertex-II
FPGA's with some simple example?


Shahzad Saleem

 

[Sean Durkin]

ssaleem wrote:

Can someone tell me about the steps to partially reconfigure Vertex-II
FPGA's with some simple example?
I recommend Application Note 290:

http://www.xilinx.com/bvdocs/appnotes/xapp290.pdf

There are no really simple examples for partial reconfiguration, since
it just is not that simple...

cu,
Sean

 

[John Williams]

Sean Durkin wrote:

ssaleem wrote:

Can someone tell me about the steps to partially reconfigure Vertex-II
FPGA's with some simple example?

I recommend Application Note 290:

http://www.xilinx.com/bvdocs/appnotes/xapp290.pdf

There are no really simple examples for partial reconfiguration, since
it just is not that simple...

The simplest way I know to actually demonstrate partial reconfig is to
hand edit a trivial design in fpga_editor, eg route vcc to an IOB,
generate the NCD file, run bitgen to get a .bit file, then edit the NCD
again but route that same IOB to ground, save the new NCD, re-run bitgen
with the -r option, to create a partial bitstream relative to the first one.

Then, configure with the first bitstream, the IOB goes high (choose one
that's connected to an LED on the board), then download the partial
bitstream, the LED should turn off.

Congratulations, you have entered the race for the most complicated
blinkenlight application, just like the rest of us!

So, it's partial reconfig, but entirely useless. Next, start exploring
the tools to generate partial bitstreams in a modular fashion. Feel
free to subscribe to the partial-reconfig mailing list, and ask
questions/discuss there. It's quiet, but still interesting:

email majorodomo@itee.uq.edu.au, with *body text*
"subscribe partial-reconfig" (no quotes)

Regards,

John