Parallel Cable 4 & Linux

Rudolf Usselmann · Dec 20, 2003

I just found out that ISE 6.1 for Linux does not support
the Parallel Cable 4 (both products from Xilinx ! ).

Does anybody know of a tools that will allow me to use
the Parallel Cable 4 under Linux ? (All I need is JTAG
download and verify).

Thanks,
rudi
========================================================
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Uwe Bonnes · Dec 20, 2003

Rudolf Usselmann <russelmann@hotmail.com> wrote:
: I just found out that ISE 6.1 for Linux does not support
: the Parallel Cable 4 (both products from Xilinx ! ).

: Does anybody know of a tools that will allow me to use
: the Parallel Cable 4 under Linux ? (All I need is JTAG
: download and verify).

As Download Cable uses a WinDriver driver and WinDriver is also available on
Linux, I thought ISE 6.1 for Linux would support Parallel Cable 4 for Linux
too. Sad to hear that it is not the case.
http://www.xilinx.com/xlnx/xebiz/html/cable_compar_chart.htm
also doesn't mention Linux for "ISE 6.1 for Linux"

If Xilinx would look at the Linux Parport/ppdev API, it should be easy for
them to write a driver in a short time.

For now you can have a look at NAXJP
(http://www.nahitech.com/nahitafu/naxjp/naxjp-e.html), which supports some
devices. Nahitafu's idea to use the bit file for programming seema also to
consider.

Bye
--
Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------

Steve Lass · Dec 22, 2003

ISE 6.2i will support the Parallel 4 cable on Linux.

Uwe Bonnes wrote:

Rudolf Usselmann <russelmann@hotmail.com> wrote:
: I just found out that ISE 6.1 for Linux does not support
: the Parallel Cable 4 (both products from Xilinx ! ).

: Does anybody know of a tools that will allow me to use
: the Parallel Cable 4 under Linux ? (All I need is JTAG
: download and verify).

As Download Cable uses a WinDriver driver and WinDriver is also available on
Linux, I thought ISE 6.1 for Linux would support Parallel Cable 4 for Linux
too. Sad to hear that it is not the case.
http://www.xilinx.com/xlnx/xebiz/html/cable_compar_chart.htm
also doesn't mention Linux for "ISE 6.1 for Linux"

If Xilinx would look at the Linux Parport/ppdev API, it should be easy for
them to write a driver in a short time.

For now you can have a look at NAXJP
(http://www.nahitech.com/nahitafu/naxjp/naxjp-e.html), which supports some
devices. Nahitafu's idea to use the bit file for programming seema also to
consider.

Bye

Rudolf Usselmann · Dec 26, 2003

Steve Lass <lass@xilinx.com> wrote in message news:<bs79d2$84a1@cliff.xsj.xilinx.com>...

ISE 6.2i will support the Parallel 4 cable on Linux.

Thats great. So what am I supposed to do in the mean while ?

Shut down my company until you guys make your software work
with your hardware ?

Seriously, this is a real problem, and nobody seems to have
a solution. I tries modifying the software in app 058, but
that also needs a PC piece of SW to translate svf to xsvf
files.

Can you, Steve, or somebody else at Xilinx provide a Linux
version (or source code) for the svf to xsvf translator ?

Also, in the answer records, it states the schematic for
parallel cable 4 is unavailable because it is a "proprietary"
design. This seems to me really nonsense, you guys make
money with FPGAs not with cables. releasing the schematic
will enable users to support them selves when you guys
can't. Could you please ask the appropriate people to
reconsider this choice ?

Do you have a date for 6.2i (patch?) ?

Thanks,
rudi
========================================================
ASICS.ws ::: Solutions for your ASIC/FPGA needs :::
...............::: FPGAs * Full Custom ICs * IP Cores :::
FREE IP Cores -> http://www.asics.ws/ <- FREE EDA Tools

Larry Doolittle · Dec 29, 2003

Rudolf Usselmann wrote:

Also, in the answer records, it states the schematic for
parallel cable 4 is unavailable because it is a "proprietary"
design. This seems to me really nonsense, you guys make
money with FPGAs not with cables. releasing the schematic
will enable users to support them selves when you guys
can't. Could you please ask the appropriate people to
reconsider this choice ?

If you open up the parallel cable 4, you will see it is
built with a big CPLD, so it is clearly a parallel-serial
converter (serializer). The PC sends in bytes in a
normal "line printer" strobed mode, and the CPLD turns
that into the JTAG data stream.

That said, there's a lot of room for "innovation" (cough,
"problem solving" for us engineers, try telling that to
the lawyers) in how that transaction happens, especially
controlling the JTAG state machine before getting to the
bulk bit transfer mode.

If you can take the performance hit, I recommend you switch
back to Parallel Cable 3, for which Linux drivers are trivial
and widely published. Also, I can put you in touch with
someone who made an "open source" USB-to-JTAG programmer,
out of an XC2S30 and an FT245B. Schematics, FPGA code, and
software are published. Linux drivers are provably possible,
but not demonstrated -- of course, Xilinx packaged software
will probably never support this device. I personally have
access to one board.

- Larry

Rudolf Usselmann · Dec 30, 2003

Larry Doolittle <ldoolitt@recycle.lbl.gov> wrote in message news:<slrnbv0usm.ird.ldoolitt@recycle.lbl.gov>...

If you open up the parallel cable 4, you will see it is
built with a big CPLD, so it is clearly a parallel-serial
converter (serializer). The PC sends in bytes in a
normal "line printer" strobed mode, and the CPLD turns
that into the JTAG data stream.

Actually, right after powerup, it does behave just like a
Parallel Cable 3. I can toggle the lines and read the sense
just as it is documented for the Par. Cable 3.

I wonder however, how to put the cable in to the "enhanced"
mode, e.g. using the parallel to serial conversion.

If you can take the performance hit, I recommend you switch
back to Parallel Cable 3, for which Linux drivers are trivial
and widely published. Also, I can put you in touch with
someone who made an "open source" USB-to-JTAG programmer,
out of an XC2S30 and an FT245B. Schematics, FPGA code, and
software are published. Linux drivers are provably possible,
but not demonstrated -- of course, Xilinx packaged software
will probably never support this device. I personally have
access to one board.

Yes, definitely, please post that info.

I started writing a program that would emulate the JTAG tap
controller but got stuck, as I could not debug it. If there
is anybody interested in working with me on that, I would like
to continue the project ...

I also looked at app note 058, which pretty much does what I need,
except it again requires you to run a translator program (svf->xsvf
on a Windoze box). I converted ALL my systems that where running
the Windoze Trojan Horse/Worm/Obscure Piece of Crap OS to Linux.

- Larry

Thanks,
rudi
========================================================
ASICS.ws ::: Solutions for your ASIC/FPGA needs :::
...............::: FPGAs * Full Custom ICs * IP Cores :::
FREE IP Cores -> http://www.asics.ws/ <- FREE EDA Tools

Peter C. Wallace · Dec 30, 2003

On Tue, 30 Dec 2003 00:45:26 -0800, Rudolf Usselmann wrote:

Larry Doolittle <ldoolitt@recycle.lbl.gov> wrote in message
news:<slrnbv0usm.ird.ldoolitt@recycle.lbl.gov>...

If you open up the parallel cable 4, you will see it is built with a
big CPLD, so it is clearly a parallel-serial converter (serializer).
The PC sends in bytes in a normal "line printer" strobed mode, and the
CPLD turns that into the JTAG data stream.

Actually, right after powerup, it does behave just like a Parallel Cable
3. I can toggle the lines and read the sense just as it is documented
for the Par. Cable 3.

I wonder however, how to put the cable in to the "enhanced" mode, e.g.
using the parallel to serial conversion.

If you can take the performance hit, I recommend you switch back to
Parallel Cable 3, for which Linux drivers are trivial and widely
published. Also, I can put you in touch with someone who made an "open
source" USB-to-JTAG programmer, out of an XC2S30 and an FT245B.
Schematics, FPGA code, and software are published. Linux drivers are
provably possible, but not demonstrated -- of course, Xilinx packaged
software will probably never support this device. I personally have
access to one board.

Yes, definitely, please post that info.

I started writing a program that would emulate the JTAG tap controller
but got stuck, as I could not debug it. If there is anybody interested
in working with me on that, I would like to continue the project ...

I also looked at app note 058, which pretty much does what I need,
except it again requires you to run a translator program (svf->xsvf on a
Windoze box). I converted ALL my systems that where running the Windoze
Trojan Horse/Worm/Obscure Piece of Crap OS to Linux.

Jim Kearney is doing some firmware upgrades to the USB-JTAG at the moment
but we would welcome anyone wanting to help port the software to Linux.

There is a FTDI driver for Linux (and xBSD), so the low level interface
should not be too difficult.

I am willing to give free hardware to anyone that contributes to porting
or improving the software (Larry I have a REVB assembed card here if you
stop by and pick it up)

Currently status is as follows:

BITfile download, SVF player work from Windows
Shift rates from 250 KHZ to 48 MHz
2 independent TAP controllers
programmable series termination on TCK output and parallel passive
termination on TDO (primary TAP only)
Firmware bug fixes/ REVB card updates being done now (Thanks Jim!)

GPLed software,firmware, and schematics are located here:

http://www.mesanet.com/software/parallel/jtag.zip

Peter Wallace

- Larry

Thanks,
rudi
========================================================
ASICS.ws ::: Solutions for your ASIC/FPGA needs :::
..............::: FPGAs * Full Custom ICs * IP Cores ::: FREE IP Cores
-> http://www.asics.ws/ <- FREE EDA Tools

Steve Lass · Dec 31, 2003

Rudolf Usselmann wrote:

Steve Lass <lass@xilinx.com> wrote in message news:<bs79d2$84a1@cliff.xsj.xilinx.com>...

ISE 6.2i will support the Parallel 4 cable on Linux.

Thats great. So what am I supposed to do in the mean while ?

The MultiLinx cable works today under Linux. You could try contacting

your local rep, distributor or FAE and ask to borrow a
MultiLinx cable until 6.2i is released. I'm betting somebody has one
that they can lend you. It will work with the serial connection
(not the USB connection) on your PC under Linux.

Seriously, this is a real problem, and nobody seems to have
a solution. I tries modifying the software in app 058, but
that also needs a PC piece of SW to translate svf to xsvf
files.

Can you, Steve, or somebody else at Xilinx provide a Linux
version (or source code) for the svf to xsvf translator ?

As for creating XSVF files (if you really want to go down this path),

that can be done on Linux today using iMPACT. Basically
just go into iMPACT, and target an XSVF file. There is no need for the
external SVF2XSVF translator in 6.1i.

Also, in the answer records, it states the schematic for
parallel cable 4 is unavailable because it is a "proprietary"
design. This seems to me really nonsense, you guys make
money with FPGAs not with cables. releasing the schematic
will enable users to support them selves when you guys
can't. Could you please ask the appropriate people to
reconsider this choice ?

I'll forward your request.

Do you have a date for 6.2i (patch?) ?

February 2004.

Regards,

Steve

Thanks,
rudi
========================================================
ASICS.ws ::: Solutions for your ASIC/FPGA needs :::
..............::: FPGAs * Full Custom ICs * IP Cores :::
FREE IP Cores -> http://www.asics.ws/ <- FREE EDA Tools

Rudolf Usselmann · Jan 1, 2004

Yachooo !!! I got my linux JTAG programmer working !!!

Right now it is very primitive and has only been tested with
Virtex devices, but my guess is that it will work with most
Xilinx FPGAs. If you try this, please drop me an email with
your success/failure story, I will add a summary as I go along.
Also if you fix anything, please email me. If anybody (wants
to make this a sourceforge project and maintain, please do so
(I'll continue to be a contributor) !!!

To summarize:
- It works under LINUX ! YES !
- Should work with Parallel Cable 3(not tested yet) and 4
- takes a plain binary .bit file
- Open/Free Source code ! YES !

Sorry could not figure out how to attach the small file
to this poting using google, may be it's better this way
anyway. You can download the source code from:
http://www.asics.ws/tools/ljp.c.gz

Best Regards,
rudi
========================================================
ASICS.ws ::: Solutions for your ASIC/FPGA needs :::
...............::: FPGAs * Full Custom ICs * IP Cores :::
FREE IP Cores -> http://www.asics.ws/ <- FREE EDA Tools

Parallel Cable 4 & Linux

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